From:   Hongxing Zhu <hongxing.zhu@nxp.com>
To:     =?iso-8859-2?Q?Krzysztof_Wilczy=F1ski?= <kw@linux.com>
CC:     "l.stach@pengutronix.de" <l.stach@pengutronix.de>,
        "bhelgaas@google.com" <bhelgaas@google.com>,
        "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
        Marcel Ziswiler <marcel.ziswiler@toradex.com>,
        "tharvey@gateworks.com" <tharvey@gateworks.com>,
        "kishon@ti.com" <kishon@ti.com>,
        "vkoul@kernel.org" <vkoul@kernel.org>,
        "robh@kernel.org" <robh@kernel.org>,
        "galak@kernel.crashing.org" <galak@kernel.crashing.org>,
        "shawnguo@kernel.org" <shawnguo@kernel.org>,
        "linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "kernel@pengutronix.de" <kernel@pengutronix.de>,
        dl-linux-imx <linux-imx@nxp.com>
Subject: RE: [PATCH v7 8/8] PCI: imx: Add the imx8mm pcie support
Thread-Topic: [PATCH v7 8/8] PCI: imx: Add the imx8mm pcie support
Thread-Index: AQHX51bdQrJfUAGahEmIU+86q0TYAKw1a7+AgACkc9A=
Date:   Fri, 17 Dec 2021 05:54:21 +0000
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References: <1638432158-4119-1-git-send-email-hongxing.zhu@nxp.com>
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 =?iso-8859-2?Q?MAFzmRAcljwVtx1pnFtbjpa+lM321DJ1MzKClM7SUvfXkZQIiPcMHrvcrF?=
 =?iso-8859-2?Q?64mdt4H9dyppe3ccf69WqACGu0L+ocXL5xBx3VX+aMW9FUZBEpKl746ltT?=
 =?iso-8859-2?Q?44AA2j0JpcW8XHdy1IKdetjcp2JsT7fAwTR1lT9SmNVlmMNKc6Yv0SsS0/?=
 =?iso-8859-2?Q?n3yNX15Sc6BasgxuODqNfKbsEYzZYmM1zlP2uh3QICU9ZsBraS1H6VWHNE?=
 =?iso-8859-2?Q?hH9XWlKDN8d3W6EBw2rzRk4HZeihrIEjJUqNylqKzQjMVkJszLvlScWWaw?=
 =?iso-8859-2?Q?05CjMhacdGmtNfLhW/SYz2VzbMl5mAMg5Zx5VZKcK/Jdnqad0JDb+TGOCE?=
 =?iso-8859-2?Q?++r/ADXqC0XnA5dSfjPbGMOPJV5nHHh7ibeshIEW+VGuAQKde6nVERmMpM?=
 =?iso-8859-2?Q?YeemcetCMHyqu/DRnonuHpjDBfmsvYtt0VmjIrVlPCFlK+CLzsyG+b/nhZ?=
 =?iso-8859-2?Q?uPAJxbAcNtkce7CtNkJWZNiKQWbT7sMjokkrNW4iP5J+ribEeD00vVR7Pd?=
 =?iso-8859-2?Q?67Wyjq5caU5qcsIZnJNHbIf7D3OOstknVZIhXl1m3CZZ/XjsDsF+rR9tUf?=
 =?iso-8859-2?Q?c5YrK8/3hxBZbqQKGG2skblP668jYMyUEo0vT3ENyRucIHsic4bv95K5za?=
 =?iso-8859-2?Q?JEfm9EMQYTLf9Ssz7sMc4vunmxS/T2Q32IUXKesTarIlELacjGUAlDmMC2?=
 =?iso-8859-2?Q?lKf4rau7Zxd72jsRhVoG1EC6x75ccUi+t4xnheWPszt3msVOy7IgXimGCY?=
 =?iso-8859-2?Q?YFYPSe37+r0vAhCl5Xd5F04N17bQooCsn0aWviasS6mMimIJPzw+lVSIrl?=
 =?iso-8859-2?Q?C/gyQpLMn49OL0gJjjdTA9CWr3UjIAZt/C/ZcGzrthyU98AP1+tcjK0GjK?=
 =?iso-8859-2?Q?FKULsMhhiJLWmIewGaXQDFa/8/w9+mhsBnhjpYENaq2fQBHr2Rxm4G17To?=
 =?iso-8859-2?Q?FHHgH0MyFctaZ5YZZEjB+B/mY4SMuOv9UvDbgJ3I10DOtYz1zled33gVqu?=
 =?iso-8859-2?Q?ZVCdf8pFPXTBiX2dfN60TvYKJ0Qx5VtRG0B8dYuu8BQ8D7TGvWgSR++bYR?=
 =?iso-8859-2?Q?a4IzcuDiEsTg0LQPn4Ixj8tjjtZRUOntm1kcxUfQtzuSXC7PBTa0/UBi3u?=
 =?iso-8859-2?Q?6Fpi52rRNhzc2djBs1DOFVOuMB63OBAhh7448LcgB2ApVO14ntpoKCrFSn?=
 =?iso-8859-2?Q?AJBXseykD7QNEYp+DkvWWujPwPJFyaAZ2jIH4ftO3YI7jGOHGTLHS+zb/o?=
 =?iso-8859-2?Q?GzWeSi0Wo2EuVksSYHl0uZ+DTV8wTg4LzkKhb3Yu2dHtrw7a6sr8t5NzAz?=
 =?iso-8859-2?Q?7dHopkfcEt92QYm0qx54ZiumiVdW2xNleGYJBmrXecfkUhxe6kTVLaCSyq?=
 =?iso-8859-2?Q?pDUvXBG+ur+/TZh2KvQA+NGwnoQC24Dc9oD3TJ/KX97ySnSdNkBO1q5vwQ?=
 =?iso-8859-2?Q?9wwY+6e4UBPb2vh9rn1US2KS+5QV4pQLsxItp8JrCIbhVYD5xkO07IA2/e?=
 =?iso-8859-2?Q?TzKeB8NdB4G3fo2Qmva4SI4it9jgLRPUZguG3FOoQEKTZLWnVjZcqK5u0y?=
 =?iso-8859-2?Q?+wnorftvxxo6Zl8TR9IgHjYINl8apV7bf6vPU6JllEAkdVH7koLDReVQ?=
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> -----Original Message-----
> From: Krzysztof Wilczy=F1ski <kw@linux.com>
> Sent: Friday, December 17, 2021 12:52 AM
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; bhelgaas@google.com;
> lorenzo.pieralisi@arm.com; Marcel Ziswiler
> <marcel.ziswiler@toradex.com>; tharvey@gateworks.com;
> kishon@ti.com; vkoul@kernel.org; robh@kernel.org;
> galak@kernel.crashing.org; shawnguo@kernel.org;
> linux-phy@lists.infradead.org; devicetree@vger.kernel.org;
> linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
> <linux-imx@nxp.com>
> Subject: Re: [PATCH v7 8/8] PCI: imx: Add the imx8mm pcie support
>=20
> Hi Richard,
>=20
> Apologies for a very late review!  Especially since Lorenzo already took
> patches as per:
>=20
>=20
> https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Flor
> e.kernel.org%2Flinux-pci%2F163965080404.20006.52416095516435017
> 49.b4-ty%40arm.com%2F&amp;data=3D04%7C01%7Chongxing.zhu%40nxp
> .com%7C8afb673348214261883608d9c0b45b1d%7C686ea1d3bc2b4c6fa
> 92cd99c5c301635%7C0%7C0%7C637752703124166805%7CUnknown%7
> CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=3DrfmN1Xojubap2vi3J4Jol3ozy
> N1Q2q7YiBM5bqMm22s%3D&amp;reserved=3D0
>=20
> However, perhaps it's not too late.
[Richard Zhu] Hi Krzysztof:=20
Thanks for your review.
But I don't know how to handle this situation.
How about that I add this refine patch into the following bug fix and
 refine patch-set later?
PCI: imx6: refine codes and add compliance tests mode support
" https://patchwork.kernel.org/project/linux-arm-kernel/cover/1635747478-25=
562-1-git-send-email-hongxing.zhu@nxp.com/"

>=20
> [...]
> > @@ -446,6 +452,13 @@ static int imx6_pcie_enable_ref_clk(struct
> imx6_pcie *imx6_pcie)
> >  		break;
> >  	case IMX7D:
> >  		break;
> > +	case IMX8MM:
> > +		ret =3D clk_prepare_enable(imx6_pcie->pcie_aux);
> > +		if (ret) {
> > +			dev_err(dev, "unable to enable pcie_aux clock\n");
> > +			break;
> > +		}
> > +		break;
>=20
> You can drop the inner break, it wouldn't do much here, unless this was
> intended to be a return?
[Richard Zhu] Yes, it is. The inner break can be dropped. The error return
would be handled in the end.

>=20
> > @@ -538,6 +559,10 @@ static void
> imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
> >  	case IMX8MQ:
> >  		reset_control_deassert(imx6_pcie->pciephy_reset);
> >  		break;
> > +	case IMX8MM:
> > +		if (phy_init(imx6_pcie->phy) !=3D 0)
> > +			dev_err(dev, "Waiting for PHY ready timeout!\n");
> > +		break;
>=20
> If the above, you can keep the same style as used throughout the file
> already, so it would just simply be:
>=20
>   if (phy_init(imx6_pcie->phy))
>=20
> Also, a nitpick: to be consistent with other such messages here, the erro=
r
> message would be all lower-case letters.
[Richard Zhu] Yes, it is.
>=20
> [...]
> > @@ -614,6 +639,8 @@ static void imx6_pcie_configure_type(struct
> > imx6_pcie *imx6_pcie)  static void imx6_pcie_init_phy(struct
> imx6_pcie
> > *imx6_pcie)  {
> >  	switch (imx6_pcie->drvdata->variant) {
> > +	case IMX8MM:
> > +		break;
> >  	case IMX8MQ:
>=20
> Would it warrant a comment that adds a note there to this single bare
> break?  Perhaps this version is not support, lack this particular
> functionality, etc.
[Richard Zhu] Yes, it's easier to understand after add one comment.
>=20
> [...]
> > @@ -1089,10 +1122,39 @@ static int imx6_pcie_probe(struct
> platform_device *pdev)
> >  			dev_err(dev, "Failed to get PCIE APPS reset control\n");
> >  			return PTR_ERR(imx6_pcie->apps_reset);
> >  		}
> > +		break;
> > +	case IMX8MM:
> > +		imx6_pcie->pcie_aux =3D devm_clk_get(dev, "pcie_aux");
> > +		if (IS_ERR(imx6_pcie->pcie_aux))
> > +			return dev_err_probe(dev,
> PTR_ERR(imx6_pcie->pcie_aux),
> > +					     "pcie_aux clock source missing or
> invalid\n");
> > +		imx6_pcie->apps_reset =3D
> devm_reset_control_get_exclusive(dev,
> > +									 "apps");
> > +		if (IS_ERR(imx6_pcie->apps_reset)) {
> > +			dev_err(dev, "Failed to get PCIE APPS reset control\n");
> > +			return PTR_ERR(imx6_pcie->apps_reset);
> > +		}
> > +
> > +		imx6_pcie->phy =3D devm_phy_get(dev, "pcie-phy");
> > +		if (IS_ERR(imx6_pcie->phy)) {
> > +			if (PTR_ERR(imx6_pcie->phy) =3D=3D -EPROBE_DEFER)
> > +				return -EPROBE_DEFER;
> > +			dev_err(dev, "Failed to get PCIE PHY\n");
> > +			return PTR_ERR(imx6_pcie->phy);
> > +		}
>=20
> A question about handling of the -EPROBE_DEFER above: why not to use
> the
> dev_err_probe() helper similarly to the code above and below?  Would
> there be something different preventing the use of dev_err_probe() here
> too?
[Richard Zhu] To be aligned, the above one can be replaced totally.
I didn't want to dump the error message when -EPROBE_DEFFER occurs.
Anyway, I can make them aligned later.

Best Regards
Richard

>=20
> >  		break;
> >  	default:
> >  		break;
> >  	}
> > +	/* Don't fetch the pcie_phy clock, if it has abstract PHY driver */
> > +	if (imx6_pcie->phy =3D=3D NULL) {
> > +		imx6_pcie->pcie_phy =3D devm_clk_get(dev, "pcie_phy");
> > +		if (IS_ERR(imx6_pcie->pcie_phy))
> > +			return dev_err_probe(dev,
> PTR_ERR(imx6_pcie->pcie_phy),
> > +					     "pcie_phy clock source missing or
> invalid\n");
> > +	}
>=20
> Thank you for another amazing patch!
>=20
> 	Krzysztof