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[209.85.128.48]) by smtp.gmail.com with ESMTPSA id 24sm3979568eje.52.2021.12.18.16.42.34 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 18 Dec 2021 16:42:34 -0800 (PST) Received: by mail-wm1-f48.google.com with SMTP id g132so1489047wmg.2 for ; Sat, 18 Dec 2021 16:42:34 -0800 (PST) X-Received: by 2002:a05:600c:1d97:: with SMTP id p23mr8286016wms.144.1639874161442; Sat, 18 Dec 2021 16:36:01 -0800 (PST) MIME-Version: 1.0 References: <54c492d7-ddcd-dcd0-7209-efb2847adf7c@redhat.com> <20211217204705.GF6385@nvidia.com> <2E28C79D-F79C-45BE-A16C-43678AD165E9@vmware.com> <20211218030509.GA1432915@nvidia.com> <5C0A673F-8326-4484-B976-DA844298DB29@vmware.com> <20211218184233.GB1432915@nvidia.com> <5CA1D89F-9DDB-4F91-8929-FE29BB79A653@vmware.com> <4D97206A-3B32-4818-9980-8F24BC57E289@vmware.com> In-Reply-To: <4D97206A-3B32-4818-9980-8F24BC57E289@vmware.com> From: Linus Torvalds Date: Sat, 18 Dec 2021 16:35:45 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1 06/11] mm: support GUP-triggered unsharing via FAULT_FLAG_UNSHARE (!hugetlb) To: Nadav Amit Cc: Jason Gunthorpe , David Hildenbrand , Linux Kernel Mailing List , Andrew Morton , Hugh Dickins , David Rientjes , Shakeel Butt , John Hubbard , Mike Kravetz , Mike Rapoport , Yang Shi , "Kirill A . Shutemov" , Matthew Wilcox , Vlastimil Babka , Jann Horn , Michal Hocko , Rik van Riel , Roman Gushchin , Andrea Arcangeli , Peter Xu , Donald Dutile , Christoph Hellwig , Oleg Nesterov , Jan Kara , Linux-MM , "open list:KERNEL SELFTEST FRAMEWORK" , "open list:DOCUMENTATION" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Dec 18, 2021 at 4:19 PM Nadav Amit wrote: > > I have always felt that the PTE software-bits limit is very artificial. > We can just allocate two adjacent pages when needed, one for PTEs and > one for extra software bits. A software bit in the PTE can indicate > =E2=80=9Cextra software bits=E2=80=9D are relevant (to save cache-misses)= , and a bit > in the PTEs' page-struct indicate whether there is adjacent =E2=80=9Cextr= a > software bits=E2=80=9D page. Hmm. That doesn't sound very bad, no. And it would be nice to have more software bits (and have them portably). > I don=E2=80=99t think that I am following. The write-protection of UFFD m= eans > that the userspace wants to intervene before anything else (including > COW). The point I was making (badly) is that UFFD_WP is only needed to for the case where the pte isn't already non-writable for other reasons. > UFFD_WP indications are recorded per PTE (i.e., not VMA). The changing of those bits are basically a bastardized 'mprotect()', and does already require the vma to be marked VM_UFFD_WP. And the way you set (or clear) the bits is with a range operation. It really could have been done with mprotect(), and with actual explicit vma bits. The fact that it now uses the page table bit is rather random. I think it would actually be cleaner to make that userfaultfd_writeprotect truly *be* a vma range. Right now it's kind of "half this, half that". Of course, it's possible that because of this situation, some users do a lot of fine-grained VM_UFFD_WP setting, and they kind of expect to not have issues with lots of vma fragments. So practical concerns may have made the implementation set in stone. (I have only ever seen the kernel side of uffd, not the actual user side, so I'm not sure about the use patterns). That said, your suggestion of a shadow sw page table bit thing would also work. And it would solve some problems we have in core areas (notably "page_special()" which right now has that ARCH_HAS_PTE_SPECIAL thing). It would make it really easy to have that "this page table entry is pinned" flag too. Linus