Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F2F2C433FE for ; Tue, 21 Dec 2021 06:50:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234540AbhLUGud (ORCPT ); Tue, 21 Dec 2021 01:50:33 -0500 Received: from mga06.intel.com ([134.134.136.31]:29894 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234422AbhLUGuY (ORCPT ); Tue, 21 Dec 2021 01:50:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1640069424; x=1671605424; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5p/QeWqqsKN4fn1fn79UyfS3SgoAGrBnf5/Vml3/3lI=; b=K3mGsHQ7PzwvUsmxuxz13OZEY0RWN08B5vkPyfAoFmjlquFEm7QQDkny vEl18wqiXXwkKF4OFT2liLW0fE6/Vpw0yI8AWBqeqwbdhnZVDQXHG5iQy 1w7ORNTgg74WO2PFKiQ8gTukfiyXytI75issRpUKbAVKONgWmWin6f3vi sC/1sawQA/hpwh6dRLywfef4uQC2lcmNnBCRHRBI0azP7nVeNwNEpfAbt V6ir9QZghkGUtDbarkA2BdUUpz4/I95kxmY97i+EbD1hkjsUwt88PIY/W LoLAS+0WE9At0rnRGKYdA2HD645hDIoRiHZhQ55UfAuDpqh5qnDkkxuHG Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10204"; a="301107480" X-IronPort-AV: E=Sophos;i="5.88,222,1635231600"; d="scan'208";a="301107480" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2021 22:50:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,222,1635231600"; d="scan'208";a="570119028" Received: from unknown (HELO localhost.localdomain) ([10.228.150.100]) by fmsmga008.fm.intel.com with ESMTP; 20 Dec 2021 22:50:22 -0800 From: Mike Ximing Chen To: linux-kernel@vger.kernel.org Cc: arnd@arndb.de, gregkh@linuxfoundation.org, dan.j.williams@intel.com, pierre-louis.bossart@linux.intel.com, netdev@vger.kernel.org, davem@davemloft.net, kuba@kernel.org Subject: [RFC PATCH v12 07/17] dlb: add low-level register reset operations Date: Tue, 21 Dec 2021 00:50:37 -0600 Message-Id: <20211221065047.290182-8-mike.ximing.chen@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20211221065047.290182-1-mike.ximing.chen@intel.com> References: <20211221065047.290182-1-mike.ximing.chen@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Program all registers used to configure the domain's resources back to their reset values during scheduling domain reset. This ensures the device is in a known good state if/when it is configured again in the future. Additional work is required if a resource is in-use (e.g. a queue is non-empty) at that time. Support for these cases will be added in subsequent commits. Signed-off-by: Mike Ximing Chen --- drivers/misc/dlb/dlb_regs.h | 3527 ++++++++++++++++++++++++++++++- drivers/misc/dlb/dlb_resource.c | 387 ++++ 2 files changed, 3902 insertions(+), 12 deletions(-) diff --git a/drivers/misc/dlb/dlb_regs.h b/drivers/misc/dlb/dlb_regs.h index 0fd499f384de..5e4609504a01 100644 --- a/drivers/misc/dlb/dlb_regs.h +++ b/drivers/misc/dlb/dlb_regs.h @@ -4,25 +4,3475 @@ #ifndef __DLB_REGS_H #define __DLB_REGS_H -#include +#define PF_VF2PF_MAILBOX_BYTES 256 +#define PF_VF2PF_MAILBOX(vf_id, x) \ + (0x1000 + 0x4 * (x) + (vf_id) * 0x10000) +#define PF_VF2PF_MAILBOX_RST 0x0 + +#define PF_VF2PF_MAILBOX_MSG 0xFFFFFFFF +#define PF_VF2PF_MAILBOX_MSG_LOC 0 + +#define PF_VF2PF_MAILBOX_ISR(vf_id) \ + (0x1f00 + (vf_id) * 0x10000) +#define PF_VF2PF_MAILBOX_ISR_RST 0x0 + +#define PF_VF2PF_MAILBOX_ISR_VF0_ISR 0x00000001 +#define PF_VF2PF_MAILBOX_ISR_VF1_ISR 0x00000002 +#define PF_VF2PF_MAILBOX_ISR_VF2_ISR 0x00000004 +#define PF_VF2PF_MAILBOX_ISR_VF3_ISR 0x00000008 +#define PF_VF2PF_MAILBOX_ISR_VF4_ISR 0x00000010 +#define PF_VF2PF_MAILBOX_ISR_VF5_ISR 0x00000020 +#define PF_VF2PF_MAILBOX_ISR_VF6_ISR 0x00000040 +#define PF_VF2PF_MAILBOX_ISR_VF7_ISR 0x00000080 +#define PF_VF2PF_MAILBOX_ISR_VF8_ISR 0x00000100 +#define PF_VF2PF_MAILBOX_ISR_VF9_ISR 0x00000200 +#define PF_VF2PF_MAILBOX_ISR_VF10_ISR 0x00000400 +#define PF_VF2PF_MAILBOX_ISR_VF11_ISR 0x00000800 +#define PF_VF2PF_MAILBOX_ISR_VF12_ISR 0x00001000 +#define PF_VF2PF_MAILBOX_ISR_VF13_ISR 0x00002000 +#define PF_VF2PF_MAILBOX_ISR_VF14_ISR 0x00004000 +#define PF_VF2PF_MAILBOX_ISR_VF15_ISR 0x00008000 +#define PF_VF2PF_MAILBOX_ISR_RSVD0 0xFFFF0000 +#define PF_VF2PF_MAILBOX_ISR_VF0_ISR_LOC 0 +#define PF_VF2PF_MAILBOX_ISR_VF1_ISR_LOC 1 +#define PF_VF2PF_MAILBOX_ISR_VF2_ISR_LOC 2 +#define PF_VF2PF_MAILBOX_ISR_VF3_ISR_LOC 3 +#define PF_VF2PF_MAILBOX_ISR_VF4_ISR_LOC 4 +#define PF_VF2PF_MAILBOX_ISR_VF5_ISR_LOC 5 +#define PF_VF2PF_MAILBOX_ISR_VF6_ISR_LOC 6 +#define PF_VF2PF_MAILBOX_ISR_VF7_ISR_LOC 7 +#define PF_VF2PF_MAILBOX_ISR_VF8_ISR_LOC 8 +#define PF_VF2PF_MAILBOX_ISR_VF9_ISR_LOC 9 +#define PF_VF2PF_MAILBOX_ISR_VF10_ISR_LOC 10 +#define PF_VF2PF_MAILBOX_ISR_VF11_ISR_LOC 11 +#define PF_VF2PF_MAILBOX_ISR_VF12_ISR_LOC 12 +#define PF_VF2PF_MAILBOX_ISR_VF13_ISR_LOC 13 +#define PF_VF2PF_MAILBOX_ISR_VF14_ISR_LOC 14 +#define PF_VF2PF_MAILBOX_ISR_VF15_ISR_LOC 15 +#define PF_VF2PF_MAILBOX_ISR_RSVD0_LOC 16 + +#define PF_VF2PF_FLR_ISR(vf_id) \ + (0x1f04 + (vf_id) * 0x10000) +#define PF_VF2PF_FLR_ISR_RST 0x0 + +#define PF_VF2PF_FLR_ISR_VF0_ISR 0x00000001 +#define PF_VF2PF_FLR_ISR_VF1_ISR 0x00000002 +#define PF_VF2PF_FLR_ISR_VF2_ISR 0x00000004 +#define PF_VF2PF_FLR_ISR_VF3_ISR 0x00000008 +#define PF_VF2PF_FLR_ISR_VF4_ISR 0x00000010 +#define PF_VF2PF_FLR_ISR_VF5_ISR 0x00000020 +#define PF_VF2PF_FLR_ISR_VF6_ISR 0x00000040 +#define PF_VF2PF_FLR_ISR_VF7_ISR 0x00000080 +#define PF_VF2PF_FLR_ISR_VF8_ISR 0x00000100 +#define PF_VF2PF_FLR_ISR_VF9_ISR 0x00000200 +#define PF_VF2PF_FLR_ISR_VF10_ISR 0x00000400 +#define PF_VF2PF_FLR_ISR_VF11_ISR 0x00000800 +#define PF_VF2PF_FLR_ISR_VF12_ISR 0x00001000 +#define PF_VF2PF_FLR_ISR_VF13_ISR 0x00002000 +#define PF_VF2PF_FLR_ISR_VF14_ISR 0x00004000 +#define PF_VF2PF_FLR_ISR_VF15_ISR 0x00008000 +#define PF_VF2PF_FLR_ISR_RSVD0 0xFFFF0000 +#define PF_VF2PF_FLR_ISR_VF0_ISR_LOC 0 +#define PF_VF2PF_FLR_ISR_VF1_ISR_LOC 1 +#define PF_VF2PF_FLR_ISR_VF2_ISR_LOC 2 +#define PF_VF2PF_FLR_ISR_VF3_ISR_LOC 3 +#define PF_VF2PF_FLR_ISR_VF4_ISR_LOC 4 +#define PF_VF2PF_FLR_ISR_VF5_ISR_LOC 5 +#define PF_VF2PF_FLR_ISR_VF6_ISR_LOC 6 +#define PF_VF2PF_FLR_ISR_VF7_ISR_LOC 7 +#define PF_VF2PF_FLR_ISR_VF8_ISR_LOC 8 +#define PF_VF2PF_FLR_ISR_VF9_ISR_LOC 9 +#define PF_VF2PF_FLR_ISR_VF10_ISR_LOC 10 +#define PF_VF2PF_FLR_ISR_VF11_ISR_LOC 11 +#define PF_VF2PF_FLR_ISR_VF12_ISR_LOC 12 +#define PF_VF2PF_FLR_ISR_VF13_ISR_LOC 13 +#define PF_VF2PF_FLR_ISR_VF14_ISR_LOC 14 +#define PF_VF2PF_FLR_ISR_VF15_ISR_LOC 15 +#define PF_VF2PF_FLR_ISR_RSVD0_LOC 16 + +#define PF_VF2PF_ISR_PEND(vf_id) \ + (0x1f10 + (vf_id) * 0x10000) +#define PF_VF2PF_ISR_PEND_RST 0x0 + +#define PF_VF2PF_ISR_PEND_ISR_PEND 0x00000001 +#define PF_VF2PF_ISR_PEND_RSVD0 0xFFFFFFFE +#define PF_VF2PF_ISR_PEND_ISR_PEND_LOC 0 +#define PF_VF2PF_ISR_PEND_RSVD0_LOC 1 + +#define PF_PF2VF_MAILBOX_BYTES 64 +#define PF_PF2VF_MAILBOX(vf_id, x) \ + (0x2000 + 0x4 * (x) + (vf_id) * 0x10000) +#define PF_PF2VF_MAILBOX_RST 0x0 + +#define PF_PF2VF_MAILBOX_MSG 0xFFFFFFFF +#define PF_PF2VF_MAILBOX_MSG_LOC 0 + +#define PF_PF2VF_MAILBOX_ISR(vf_id) \ + (0x2f00 + (vf_id) * 0x10000) +#define PF_PF2VF_MAILBOX_ISR_RST 0x0 + +#define PF_PF2VF_MAILBOX_ISR_VF0_ISR 0x00000001 +#define PF_PF2VF_MAILBOX_ISR_VF1_ISR 0x00000002 +#define PF_PF2VF_MAILBOX_ISR_VF2_ISR 0x00000004 +#define PF_PF2VF_MAILBOX_ISR_VF3_ISR 0x00000008 +#define PF_PF2VF_MAILBOX_ISR_VF4_ISR 0x00000010 +#define PF_PF2VF_MAILBOX_ISR_VF5_ISR 0x00000020 +#define PF_PF2VF_MAILBOX_ISR_VF6_ISR 0x00000040 +#define PF_PF2VF_MAILBOX_ISR_VF7_ISR 0x00000080 +#define PF_PF2VF_MAILBOX_ISR_VF8_ISR 0x00000100 +#define PF_PF2VF_MAILBOX_ISR_VF9_ISR 0x00000200 +#define PF_PF2VF_MAILBOX_ISR_VF10_ISR 0x00000400 +#define PF_PF2VF_MAILBOX_ISR_VF11_ISR 0x00000800 +#define PF_PF2VF_MAILBOX_ISR_VF12_ISR 0x00001000 +#define PF_PF2VF_MAILBOX_ISR_VF13_ISR 0x00002000 +#define PF_PF2VF_MAILBOX_ISR_VF14_ISR 0x00004000 +#define PF_PF2VF_MAILBOX_ISR_VF15_ISR 0x00008000 +#define PF_PF2VF_MAILBOX_ISR_RSVD0 0xFFFF0000 +#define PF_PF2VF_MAILBOX_ISR_VF0_ISR_LOC 0 +#define PF_PF2VF_MAILBOX_ISR_VF1_ISR_LOC 1 +#define PF_PF2VF_MAILBOX_ISR_VF2_ISR_LOC 2 +#define PF_PF2VF_MAILBOX_ISR_VF3_ISR_LOC 3 +#define PF_PF2VF_MAILBOX_ISR_VF4_ISR_LOC 4 +#define PF_PF2VF_MAILBOX_ISR_VF5_ISR_LOC 5 +#define PF_PF2VF_MAILBOX_ISR_VF6_ISR_LOC 6 +#define PF_PF2VF_MAILBOX_ISR_VF7_ISR_LOC 7 +#define PF_PF2VF_MAILBOX_ISR_VF8_ISR_LOC 8 +#define PF_PF2VF_MAILBOX_ISR_VF9_ISR_LOC 9 +#define PF_PF2VF_MAILBOX_ISR_VF10_ISR_LOC 10 +#define PF_PF2VF_MAILBOX_ISR_VF11_ISR_LOC 11 +#define PF_PF2VF_MAILBOX_ISR_VF12_ISR_LOC 12 +#define PF_PF2VF_MAILBOX_ISR_VF13_ISR_LOC 13 +#define PF_PF2VF_MAILBOX_ISR_VF14_ISR_LOC 14 +#define PF_PF2VF_MAILBOX_ISR_VF15_ISR_LOC 15 +#define PF_PF2VF_MAILBOX_ISR_RSVD0_LOC 16 + +#define PF_VF_RESET_IN_PROGRESS(vf_id) \ + (0x3000 + (vf_id) * 0x10000) +#define PF_VF_RESET_IN_PROGRESS_RST 0xffff + +#define PF_VF_RESET_IN_PROGRESS_VF0_RESET_IN_PROGRESS 0x00000001 +#define PF_VF_RESET_IN_PROGRESS_VF1_RESET_IN_PROGRESS 0x00000002 +#define PF_VF_RESET_IN_PROGRESS_VF2_RESET_IN_PROGRESS 0x00000004 +#define PF_VF_RESET_IN_PROGRESS_VF3_RESET_IN_PROGRESS 0x00000008 +#define PF_VF_RESET_IN_PROGRESS_VF4_RESET_IN_PROGRESS 0x00000010 +#define PF_VF_RESET_IN_PROGRESS_VF5_RESET_IN_PROGRESS 0x00000020 +#define PF_VF_RESET_IN_PROGRESS_VF6_RESET_IN_PROGRESS 0x00000040 +#define PF_VF_RESET_IN_PROGRESS_VF7_RESET_IN_PROGRESS 0x00000080 +#define PF_VF_RESET_IN_PROGRESS_VF8_RESET_IN_PROGRESS 0x00000100 +#define PF_VF_RESET_IN_PROGRESS_VF9_RESET_IN_PROGRESS 0x00000200 +#define PF_VF_RESET_IN_PROGRESS_VF10_RESET_IN_PROGRESS 0x00000400 +#define PF_VF_RESET_IN_PROGRESS_VF11_RESET_IN_PROGRESS 0x00000800 +#define PF_VF_RESET_IN_PROGRESS_VF12_RESET_IN_PROGRESS 0x00001000 +#define PF_VF_RESET_IN_PROGRESS_VF13_RESET_IN_PROGRESS 0x00002000 +#define PF_VF_RESET_IN_PROGRESS_VF14_RESET_IN_PROGRESS 0x00004000 +#define PF_VF_RESET_IN_PROGRESS_VF15_RESET_IN_PROGRESS 0x00008000 +#define PF_VF_RESET_IN_PROGRESS_RSVD0 0xFFFF0000 +#define PF_VF_RESET_IN_PROGRESS_VF0_RESET_IN_PROGRESS_LOC 0 +#define PF_VF_RESET_IN_PROGRESS_VF1_RESET_IN_PROGRESS_LOC 1 +#define PF_VF_RESET_IN_PROGRESS_VF2_RESET_IN_PROGRESS_LOC 2 +#define PF_VF_RESET_IN_PROGRESS_VF3_RESET_IN_PROGRESS_LOC 3 +#define PF_VF_RESET_IN_PROGRESS_VF4_RESET_IN_PROGRESS_LOC 4 +#define PF_VF_RESET_IN_PROGRESS_VF5_RESET_IN_PROGRESS_LOC 5 +#define PF_VF_RESET_IN_PROGRESS_VF6_RESET_IN_PROGRESS_LOC 6 +#define PF_VF_RESET_IN_PROGRESS_VF7_RESET_IN_PROGRESS_LOC 7 +#define PF_VF_RESET_IN_PROGRESS_VF8_RESET_IN_PROGRESS_LOC 8 +#define PF_VF_RESET_IN_PROGRESS_VF9_RESET_IN_PROGRESS_LOC 9 +#define PF_VF_RESET_IN_PROGRESS_VF10_RESET_IN_PROGRESS_LOC 10 +#define PF_VF_RESET_IN_PROGRESS_VF11_RESET_IN_PROGRESS_LOC 11 +#define PF_VF_RESET_IN_PROGRESS_VF12_RESET_IN_PROGRESS_LOC 12 +#define PF_VF_RESET_IN_PROGRESS_VF13_RESET_IN_PROGRESS_LOC 13 +#define PF_VF_RESET_IN_PROGRESS_VF14_RESET_IN_PROGRESS_LOC 14 +#define PF_VF_RESET_IN_PROGRESS_VF15_RESET_IN_PROGRESS_LOC 15 +#define PF_VF_RESET_IN_PROGRESS_RSVD0_LOC 16 + +#define MSIX_VECTOR_CTRL(x) \ + (0x100000c + (x) * 0x10) +#define MSIX_VECTOR_CTRL_RST 0x1 + +#define MSIX_VECTOR_CTRL_VEC_MASK 0x00000001 +#define MSIX_VECTOR_CTRL_RSVD0 0xFFFFFFFE +#define MSIX_VECTOR_CTRL_VEC_MASK_LOC 0 +#define MSIX_VECTOR_CTRL_RSVD0_LOC 1 + +#define IOSF_SMON_COMP_MASK1(x) \ + (0x8002024 + (x) * 0x40) +#define IOSF_SMON_COMP_MASK1_RST 0xffffffff + +#define IOSF_SMON_COMP_MASK1_COMP_MASK1 0xFFFFFFFF +#define IOSF_SMON_COMP_MASK1_COMP_MASK1_LOC 0 + +#define IOSF_SMON_COMP_MASK0(x) \ + (0x8002020 + (x) * 0x40) +#define IOSF_SMON_COMP_MASK0_RST 0xffffffff + +#define IOSF_SMON_COMP_MASK0_COMP_MASK0 0xFFFFFFFF +#define IOSF_SMON_COMP_MASK0_COMP_MASK0_LOC 0 + +#define IOSF_SMON_MAX_TMR(x) \ + (0x800201c + (x) * 0x40) +#define IOSF_SMON_MAX_TMR_RST 0x0 + +#define IOSF_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define IOSF_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define IOSF_SMON_TMR(x) \ + (0x8002018 + (x) * 0x40) +#define IOSF_SMON_TMR_RST 0x0 + +#define IOSF_SMON_TMR_TIMER_VAL 0xFFFFFFFF +#define IOSF_SMON_TMR_TIMER_VAL_LOC 0 + +#define IOSF_SMON_ACTIVITYCNTR1(x) \ + (0x8002014 + (x) * 0x40) +#define IOSF_SMON_ACTIVITYCNTR1_RST 0x0 + +#define IOSF_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define IOSF_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define IOSF_SMON_ACTIVITYCNTR0(x) \ + (0x8002010 + (x) * 0x40) +#define IOSF_SMON_ACTIVITYCNTR0_RST 0x0 + +#define IOSF_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define IOSF_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define IOSF_SMON_COMPARE1(x) \ + (0x800200c + (x) * 0x40) +#define IOSF_SMON_COMPARE1_RST 0x0 + +#define IOSF_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define IOSF_SMON_COMPARE1_COMPARE1_LOC 0 + +#define IOSF_SMON_COMPARE0(x) \ + (0x8002008 + (x) * 0x40) +#define IOSF_SMON_COMPARE0_RST 0x0 + +#define IOSF_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define IOSF_SMON_COMPARE0_COMPARE0_LOC 0 + +#define IOSF_SMON_CFG1(x) \ + (0x8002004 + (x) * 0x40) +#define IOSF_SMON_CFG1_RST 0x0 + +#define IOSF_SMON_CFG1_MODE0 0x000000FF +#define IOSF_SMON_CFG1_MODE1 0x0000FF00 +#define IOSF_SMON_CFG1_RSVD 0xFFFF0000 +#define IOSF_SMON_CFG1_MODE0_LOC 0 +#define IOSF_SMON_CFG1_MODE1_LOC 8 +#define IOSF_SMON_CFG1_RSVD_LOC 16 + +#define IOSF_SMON_CFG0(x) \ + (0x8002000 + (x) * 0x40) +#define IOSF_SMON_CFG0_RST 0x40000000 + +#define IOSF_SMON_CFG0_SMON_ENABLE 0x00000001 +#define IOSF_SMON_CFG0_RSVD2 0x0000000E +#define IOSF_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define IOSF_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define IOSF_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define IOSF_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define IOSF_SMON_CFG0_SMON_MODE 0x0000F000 +#define IOSF_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define IOSF_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define IOSF_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define IOSF_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define IOSF_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define IOSF_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define IOSF_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define IOSF_SMON_CFG0_RSVD1 0x00800000 +#define IOSF_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define IOSF_SMON_CFG0_RSVD0 0x20000000 +#define IOSF_SMON_CFG0_VERSION 0xC0000000 +#define IOSF_SMON_CFG0_SMON_ENABLE_LOC 0 +#define IOSF_SMON_CFG0_RSVD2_LOC 1 +#define IOSF_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define IOSF_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define IOSF_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define IOSF_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define IOSF_SMON_CFG0_SMON_MODE_LOC 12 +#define IOSF_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define IOSF_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define IOSF_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define IOSF_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define IOSF_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define IOSF_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define IOSF_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define IOSF_SMON_CFG0_RSVD1_LOC 23 +#define IOSF_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define IOSF_SMON_CFG0_RSVD0_LOC 29 +#define IOSF_SMON_CFG0_VERSION_LOC 30 + +#define IOSF_FUNC_VF_BAR_DSBL(x) \ + (0x20 + (x) * 0x4) +#define IOSF_FUNC_VF_BAR_DSBL_RST 0x0 + +#define IOSF_FUNC_VF_BAR_DSBL_FUNC_VF_BAR_DIS 0x00000001 +#define IOSF_FUNC_VF_BAR_DSBL_RSVD0 0xFFFFFFFE +#define IOSF_FUNC_VF_BAR_DSBL_FUNC_VF_BAR_DIS_LOC 0 +#define IOSF_FUNC_VF_BAR_DSBL_RSVD0_LOC 1 + +#define SYS_TOTAL_VAS 0x1000011c +#define SYS_TOTAL_VAS_RST 0x20 + +#define SYS_TOTAL_VAS_TOTAL_VAS 0xFFFFFFFF +#define SYS_TOTAL_VAS_TOTAL_VAS_LOC 0 + +#define SYS_TOTAL_DIR_PORTS 0x10000118 +#define SYS_TOTAL_DIR_PORTS_RST 0x40 + +#define SYS_TOTAL_DIR_PORTS_TOTAL_DIR_PORTS 0xFFFFFFFF +#define SYS_TOTAL_DIR_PORTS_TOTAL_DIR_PORTS_LOC 0 + +#define SYS_TOTAL_LDB_PORTS 0x10000114 +#define SYS_TOTAL_LDB_PORTS_RST 0x40 + +#define SYS_TOTAL_LDB_PORTS_TOTAL_LDB_PORTS 0xFFFFFFFF +#define SYS_TOTAL_LDB_PORTS_TOTAL_LDB_PORTS_LOC 0 + +#define SYS_TOTAL_DIR_QID 0x10000110 +#define SYS_TOTAL_DIR_QID_RST 0x40 + +#define SYS_TOTAL_DIR_QID_TOTAL_DIR_QID 0xFFFFFFFF +#define SYS_TOTAL_DIR_QID_TOTAL_DIR_QID_LOC 0 + +#define SYS_TOTAL_LDB_QID 0x1000010c +#define SYS_TOTAL_LDB_QID_RST 0x20 + +#define SYS_TOTAL_LDB_QID_TOTAL_LDB_QID 0xFFFFFFFF +#define SYS_TOTAL_LDB_QID_TOTAL_LDB_QID_LOC 0 + +#define SYS_TOTAL_DIR_CRDS 0x10000108 +#define SYS_TOTAL_DIR_CRDS_RST 0x1000 + +#define SYS_TOTAL_DIR_CRDS_TOTAL_DIR_CREDITS 0xFFFFFFFF +#define SYS_TOTAL_DIR_CRDS_TOTAL_DIR_CREDITS_LOC 0 + +#define SYS_TOTAL_LDB_CRDS 0x10000104 +#define SYS_TOTAL_LDB_CRDS_RST 0x2000 + +#define SYS_TOTAL_LDB_CRDS_TOTAL_LDB_CREDITS 0xFFFFFFFF +#define SYS_TOTAL_LDB_CRDS_TOTAL_LDB_CREDITS_LOC 0 + +#define SYS_ALARM_PF_SYND2 0x10000508 +#define SYS_ALARM_PF_SYND2_RST 0x0 + +#define SYS_ALARM_PF_SYND2_LOCK_ID 0x0000FFFF +#define SYS_ALARM_PF_SYND2_MEAS 0x00010000 +#define SYS_ALARM_PF_SYND2_DEBUG 0x00FE0000 +#define SYS_ALARM_PF_SYND2_CQ_POP 0x01000000 +#define SYS_ALARM_PF_SYND2_QE_UHL 0x02000000 +#define SYS_ALARM_PF_SYND2_QE_ORSP 0x04000000 +#define SYS_ALARM_PF_SYND2_QE_VALID 0x08000000 +#define SYS_ALARM_PF_SYND2_CQ_INT_REARM 0x10000000 +#define SYS_ALARM_PF_SYND2_DSI_ERROR 0x20000000 +#define SYS_ALARM_PF_SYND2_RSVD0 0xC0000000 +#define SYS_ALARM_PF_SYND2_LOCK_ID_LOC 0 +#define SYS_ALARM_PF_SYND2_MEAS_LOC 16 +#define SYS_ALARM_PF_SYND2_DEBUG_LOC 17 +#define SYS_ALARM_PF_SYND2_CQ_POP_LOC 24 +#define SYS_ALARM_PF_SYND2_QE_UHL_LOC 25 +#define SYS_ALARM_PF_SYND2_QE_ORSP_LOC 26 +#define SYS_ALARM_PF_SYND2_QE_VALID_LOC 27 +#define SYS_ALARM_PF_SYND2_CQ_INT_REARM_LOC 28 +#define SYS_ALARM_PF_SYND2_DSI_ERROR_LOC 29 +#define SYS_ALARM_PF_SYND2_RSVD0_LOC 30 + +#define SYS_ALARM_PF_SYND1 0x10000504 +#define SYS_ALARM_PF_SYND1_RST 0x0 + +#define SYS_ALARM_PF_SYND1_DSI 0x0000FFFF +#define SYS_ALARM_PF_SYND1_QID 0x00FF0000 +#define SYS_ALARM_PF_SYND1_QTYPE 0x03000000 +#define SYS_ALARM_PF_SYND1_QPRI 0x1C000000 +#define SYS_ALARM_PF_SYND1_MSG_TYPE 0xE0000000 +#define SYS_ALARM_PF_SYND1_DSI_LOC 0 +#define SYS_ALARM_PF_SYND1_QID_LOC 16 +#define SYS_ALARM_PF_SYND1_QTYPE_LOC 24 +#define SYS_ALARM_PF_SYND1_QPRI_LOC 26 +#define SYS_ALARM_PF_SYND1_MSG_TYPE_LOC 29 + +#define SYS_ALARM_PF_SYND0 0x10000500 +#define SYS_ALARM_PF_SYND0_RST 0x0 + +#define SYS_ALARM_PF_SYND0_SYNDROME 0x000000FF +#define SYS_ALARM_PF_SYND0_RTYPE 0x00000300 +#define SYS_ALARM_PF_SYND0_RSVD0 0x00001C00 +#define SYS_ALARM_PF_SYND0_IS_LDB 0x00002000 +#define SYS_ALARM_PF_SYND0_CLS 0x0000C000 +#define SYS_ALARM_PF_SYND0_AID 0x003F0000 +#define SYS_ALARM_PF_SYND0_UNIT 0x03C00000 +#define SYS_ALARM_PF_SYND0_SOURCE 0x3C000000 +#define SYS_ALARM_PF_SYND0_MORE 0x40000000 +#define SYS_ALARM_PF_SYND0_VALID 0x80000000 +#define SYS_ALARM_PF_SYND0_SYNDROME_LOC 0 +#define SYS_ALARM_PF_SYND0_RTYPE_LOC 8 +#define SYS_ALARM_PF_SYND0_RSVD0_LOC 10 +#define SYS_ALARM_PF_SYND0_IS_LDB_LOC 13 +#define SYS_ALARM_PF_SYND0_CLS_LOC 14 +#define SYS_ALARM_PF_SYND0_AID_LOC 16 +#define SYS_ALARM_PF_SYND0_UNIT_LOC 22 +#define SYS_ALARM_PF_SYND0_SOURCE_LOC 26 +#define SYS_ALARM_PF_SYND0_MORE_LOC 30 +#define SYS_ALARM_PF_SYND0_VALID_LOC 31 + +#define SYS_VF_LDB_VPP_V(x) \ + (0x10000f00 + (x) * 0x1000) +#define SYS_VF_LDB_VPP_V_RST 0x0 + +#define SYS_VF_LDB_VPP_V_VPP_V 0x00000001 +#define SYS_VF_LDB_VPP_V_RSVD0 0xFFFFFFFE +#define SYS_VF_LDB_VPP_V_VPP_V_LOC 0 +#define SYS_VF_LDB_VPP_V_RSVD0_LOC 1 + +#define SYS_VF_LDB_VPP2PP(x) \ + (0x10000f04 + (x) * 0x1000) +#define SYS_VF_LDB_VPP2PP_RST 0x0 + +#define SYS_VF_LDB_VPP2PP_PP 0x0000003F +#define SYS_VF_LDB_VPP2PP_RSVD0 0xFFFFFFC0 +#define SYS_VF_LDB_VPP2PP_PP_LOC 0 +#define SYS_VF_LDB_VPP2PP_RSVD0_LOC 6 + +#define SYS_VF_DIR_VPP_V(x) \ + (0x10000f08 + (x) * 0x1000) +#define SYS_VF_DIR_VPP_V_RST 0x0 + +#define SYS_VF_DIR_VPP_V_VPP_V 0x00000001 +#define SYS_VF_DIR_VPP_V_RSVD0 0xFFFFFFFE +#define SYS_VF_DIR_VPP_V_VPP_V_LOC 0 +#define SYS_VF_DIR_VPP_V_RSVD0_LOC 1 + +#define SYS_VF_DIR_VPP2PP(x) \ + (0x10000f0c + (x) * 0x1000) +#define SYS_VF_DIR_VPP2PP_RST 0x0 + +#define SYS_VF_DIR_VPP2PP_PP 0x0000003F +#define SYS_VF_DIR_VPP2PP_RSVD0 0xFFFFFFC0 +#define SYS_VF_DIR_VPP2PP_PP_LOC 0 +#define SYS_VF_DIR_VPP2PP_RSVD0_LOC 6 + +#define SYS_VF_LDB_VQID_V(x) \ + (0x10000f10 + (x) * 0x1000) +#define SYS_VF_LDB_VQID_V_RST 0x0 + +#define SYS_VF_LDB_VQID_V_VQID_V 0x00000001 +#define SYS_VF_LDB_VQID_V_RSVD0 0xFFFFFFFE +#define SYS_VF_LDB_VQID_V_VQID_V_LOC 0 +#define SYS_VF_LDB_VQID_V_RSVD0_LOC 1 + +#define SYS_VF_LDB_VQID2QID(x) \ + (0x10000f14 + (x) * 0x1000) +#define SYS_VF_LDB_VQID2QID_RST 0x0 + +#define SYS_VF_LDB_VQID2QID_QID 0x0000001F +#define SYS_VF_LDB_VQID2QID_RSVD0 0xFFFFFFE0 +#define SYS_VF_LDB_VQID2QID_QID_LOC 0 +#define SYS_VF_LDB_VQID2QID_RSVD0_LOC 5 + +#define SYS_LDB_QID2VQID(x) \ + (0x10000f18 + (x) * 0x1000) +#define SYS_LDB_QID2VQID_RST 0x0 + +#define SYS_LDB_QID2VQID_VQID 0x0000001F +#define SYS_LDB_QID2VQID_RSVD0 0xFFFFFFE0 +#define SYS_LDB_QID2VQID_VQID_LOC 0 +#define SYS_LDB_QID2VQID_RSVD0_LOC 5 + +#define SYS_VF_DIR_VQID_V(x) \ + (0x10000f1c + (x) * 0x1000) +#define SYS_VF_DIR_VQID_V_RST 0x0 + +#define SYS_VF_DIR_VQID_V_VQID_V 0x00000001 +#define SYS_VF_DIR_VQID_V_RSVD0 0xFFFFFFFE +#define SYS_VF_DIR_VQID_V_VQID_V_LOC 0 +#define SYS_VF_DIR_VQID_V_RSVD0_LOC 1 + +#define SYS_VF_DIR_VQID2QID(x) \ + (0x10000f20 + (x) * 0x1000) +#define SYS_VF_DIR_VQID2QID_RST 0x0 + +#define SYS_VF_DIR_VQID2QID_QID 0x0000003F +#define SYS_VF_DIR_VQID2QID_RSVD0 0xFFFFFFC0 +#define SYS_VF_DIR_VQID2QID_QID_LOC 0 +#define SYS_VF_DIR_VQID2QID_RSVD0_LOC 6 + +#define SYS_LDB_VASQID_V(x) \ + (0x10000f24 + (x) * 0x1000) +#define SYS_LDB_VASQID_V_RST 0x0 + +#define SYS_LDB_VASQID_V_VASQID_V 0x00000001 +#define SYS_LDB_VASQID_V_RSVD0 0xFFFFFFFE +#define SYS_LDB_VASQID_V_VASQID_V_LOC 0 +#define SYS_LDB_VASQID_V_RSVD0_LOC 1 + +#define SYS_DIR_VASQID_V(x) \ + (0x10000f28 + (x) * 0x1000) +#define SYS_DIR_VASQID_V_RST 0x0 + +#define SYS_DIR_VASQID_V_VASQID_V 0x00000001 +#define SYS_DIR_VASQID_V_RSVD0 0xFFFFFFFE +#define SYS_DIR_VASQID_V_VASQID_V_LOC 0 +#define SYS_DIR_VASQID_V_RSVD0_LOC 1 + +#define SYS_ALARM_VF_SYND2(x) \ + (0x10000f48 + (x) * 0x1000) +#define SYS_ALARM_VF_SYND2_RST 0x0 + +#define SYS_ALARM_VF_SYND2_LOCK_ID 0x0000FFFF +#define SYS_ALARM_VF_SYND2_DEBUG 0x00FF0000 +#define SYS_ALARM_VF_SYND2_CQ_POP 0x01000000 +#define SYS_ALARM_VF_SYND2_QE_UHL 0x02000000 +#define SYS_ALARM_VF_SYND2_QE_ORSP 0x04000000 +#define SYS_ALARM_VF_SYND2_QE_VALID 0x08000000 +#define SYS_ALARM_VF_SYND2_ISZ 0x10000000 +#define SYS_ALARM_VF_SYND2_DSI_ERROR 0x20000000 +#define SYS_ALARM_VF_SYND2_DLBRSVD 0xC0000000 +#define SYS_ALARM_VF_SYND2_LOCK_ID_LOC 0 +#define SYS_ALARM_VF_SYND2_DEBUG_LOC 16 +#define SYS_ALARM_VF_SYND2_CQ_POP_LOC 24 +#define SYS_ALARM_VF_SYND2_QE_UHL_LOC 25 +#define SYS_ALARM_VF_SYND2_QE_ORSP_LOC 26 +#define SYS_ALARM_VF_SYND2_QE_VALID_LOC 27 +#define SYS_ALARM_VF_SYND2_ISZ_LOC 28 +#define SYS_ALARM_VF_SYND2_DSI_ERROR_LOC 29 +#define SYS_ALARM_VF_SYND2_DLBRSVD_LOC 30 + +#define SYS_ALARM_VF_SYND1(x) \ + (0x10000f44 + (x) * 0x1000) +#define SYS_ALARM_VF_SYND1_RST 0x0 + +#define SYS_ALARM_VF_SYND1_DSI 0x0000FFFF +#define SYS_ALARM_VF_SYND1_QID 0x00FF0000 +#define SYS_ALARM_VF_SYND1_QTYPE 0x03000000 +#define SYS_ALARM_VF_SYND1_QPRI 0x1C000000 +#define SYS_ALARM_VF_SYND1_MSG_TYPE 0xE0000000 +#define SYS_ALARM_VF_SYND1_DSI_LOC 0 +#define SYS_ALARM_VF_SYND1_QID_LOC 16 +#define SYS_ALARM_VF_SYND1_QTYPE_LOC 24 +#define SYS_ALARM_VF_SYND1_QPRI_LOC 26 +#define SYS_ALARM_VF_SYND1_MSG_TYPE_LOC 29 + +#define SYS_ALARM_VF_SYND0(x) \ + (0x10000f40 + (x) * 0x1000) +#define SYS_ALARM_VF_SYND0_RST 0x0 + +#define SYS_ALARM_VF_SYND0_SYNDROME 0x000000FF +#define SYS_ALARM_VF_SYND0_RTYPE 0x00000300 +#define SYS_ALARM_VF_SYND0_VF_SYND0_PARITY 0x00000400 +#define SYS_ALARM_VF_SYND0_VF_SYND1_PARITY 0x00000800 +#define SYS_ALARM_VF_SYND0_VF_SYND2_PARITY 0x00001000 +#define SYS_ALARM_VF_SYND0_IS_LDB 0x00002000 +#define SYS_ALARM_VF_SYND0_CLS 0x0000C000 +#define SYS_ALARM_VF_SYND0_AID 0x003F0000 +#define SYS_ALARM_VF_SYND0_UNIT 0x03C00000 +#define SYS_ALARM_VF_SYND0_SOURCE 0x3C000000 +#define SYS_ALARM_VF_SYND0_MORE 0x40000000 +#define SYS_ALARM_VF_SYND0_VALID 0x80000000 +#define SYS_ALARM_VF_SYND0_SYNDROME_LOC 0 +#define SYS_ALARM_VF_SYND0_RTYPE_LOC 8 +#define SYS_ALARM_VF_SYND0_VF_SYND0_PARITY_LOC 10 +#define SYS_ALARM_VF_SYND0_VF_SYND1_PARITY_LOC 11 +#define SYS_ALARM_VF_SYND0_VF_SYND2_PARITY_LOC 12 +#define SYS_ALARM_VF_SYND0_IS_LDB_LOC 13 +#define SYS_ALARM_VF_SYND0_CLS_LOC 14 +#define SYS_ALARM_VF_SYND0_AID_LOC 16 +#define SYS_ALARM_VF_SYND0_UNIT_LOC 22 +#define SYS_ALARM_VF_SYND0_SOURCE_LOC 26 +#define SYS_ALARM_VF_SYND0_MORE_LOC 30 +#define SYS_ALARM_VF_SYND0_VALID_LOC 31 + +#define SYS_LDB_QID_CFG_V(x) \ + (0x10000f58 + (x) * 0x1000) +#define SYS_LDB_QID_CFG_V_RST 0x0 + +#define SYS_LDB_QID_CFG_V_SN_CFG_V 0x00000001 +#define SYS_LDB_QID_CFG_V_FID_CFG_V 0x00000002 +#define SYS_LDB_QID_CFG_V_RSVD0 0xFFFFFFFC +#define SYS_LDB_QID_CFG_V_SN_CFG_V_LOC 0 +#define SYS_LDB_QID_CFG_V_FID_CFG_V_LOC 1 +#define SYS_LDB_QID_CFG_V_RSVD0_LOC 2 + +#define SYS_LDB_QID_ITS(x) \ + (0x10000f54 + (x) * 0x1000) +#define SYS_LDB_QID_ITS_RST 0x0 + +#define SYS_LDB_QID_ITS_QID_ITS 0x00000001 +#define SYS_LDB_QID_ITS_RSVD0 0xFFFFFFFE +#define SYS_LDB_QID_ITS_QID_ITS_LOC 0 +#define SYS_LDB_QID_ITS_RSVD0_LOC 1 + +#define SYS_LDB_QID_V(x) \ + (0x10000f50 + (x) * 0x1000) +#define SYS_LDB_QID_V_RST 0x0 + +#define SYS_LDB_QID_V_QID_V 0x00000001 +#define SYS_LDB_QID_V_RSVD0 0xFFFFFFFE +#define SYS_LDB_QID_V_QID_V_LOC 0 +#define SYS_LDB_QID_V_RSVD0_LOC 1 + +#define SYS_DIR_QID_ITS(x) \ + (0x10000f64 + (x) * 0x1000) +#define SYS_DIR_QID_ITS_RST 0x0 + +#define SYS_DIR_QID_ITS_QID_ITS 0x00000001 +#define SYS_DIR_QID_ITS_RSVD0 0xFFFFFFFE +#define SYS_DIR_QID_ITS_QID_ITS_LOC 0 +#define SYS_DIR_QID_ITS_RSVD0_LOC 1 + +#define SYS_DIR_QID_V(x) \ + (0x10000f60 + (x) * 0x1000) +#define SYS_DIR_QID_V_RST 0x0 + +#define SYS_DIR_QID_V_QID_V 0x00000001 +#define SYS_DIR_QID_V_RSVD0 0xFFFFFFFE +#define SYS_DIR_QID_V_QID_V_LOC 0 +#define SYS_DIR_QID_V_RSVD0_LOC 1 + +#define SYS_LDB_CQ_AI_DATA(x) \ + (0x10000fa8 + (x) * 0x1000) +#define SYS_LDB_CQ_AI_DATA_RST 0x0 + +#define SYS_LDB_CQ_AI_DATA_CQ_AI_DATA 0xFFFFFFFF +#define SYS_LDB_CQ_AI_DATA_CQ_AI_DATA_LOC 0 + +#define SYS_LDB_CQ_AI_ADDR(x) \ + (0x10000fa4 + (x) * 0x1000) +#define SYS_LDB_CQ_AI_ADDR_RST 0x0 + +#define SYS_LDB_CQ_AI_ADDR_RSVD1 0x00000003 +#define SYS_LDB_CQ_AI_ADDR_CQ_AI_ADDR 0x000FFFFC +#define SYS_LDB_CQ_AI_ADDR_RSVD0 0xFFF00000 +#define SYS_LDB_CQ_AI_ADDR_RSVD1_LOC 0 +#define SYS_LDB_CQ_AI_ADDR_CQ_AI_ADDR_LOC 2 +#define SYS_LDB_CQ_AI_ADDR_RSVD0_LOC 20 + +#define SYS_LDB_CQ_PASID(x) \ + (0x10000fa0 + (x) * 0x1000) +#define SYS_LDB_CQ_PASID_RST 0x0 + +#define SYS_LDB_CQ_PASID_PASID 0x000FFFFF +#define SYS_LDB_CQ_PASID_EXE_REQ 0x00100000 +#define SYS_LDB_CQ_PASID_PRIV_REQ 0x00200000 +#define SYS_LDB_CQ_PASID_FMT2 0x00400000 +#define SYS_LDB_CQ_PASID_RSVD0 0xFF800000 +#define SYS_LDB_CQ_PASID_PASID_LOC 0 +#define SYS_LDB_CQ_PASID_EXE_REQ_LOC 20 +#define SYS_LDB_CQ_PASID_PRIV_REQ_LOC 21 +#define SYS_LDB_CQ_PASID_FMT2_LOC 22 +#define SYS_LDB_CQ_PASID_RSVD0_LOC 23 + +#define SYS_LDB_CQ_AT(x) \ + (0x10000f9c + (x) * 0x1000) +#define SYS_LDB_CQ_AT_RST 0x0 + +#define SYS_LDB_CQ_AT_CQ_AT 0x00000003 +#define SYS_LDB_CQ_AT_RSVD0 0xFFFFFFFC +#define SYS_LDB_CQ_AT_CQ_AT_LOC 0 +#define SYS_LDB_CQ_AT_RSVD0_LOC 2 + +#define SYS_LDB_CQ_ISR(x) \ + (0x10000f98 + (x) * 0x1000) +#define SYS_LDB_CQ_ISR_RST 0x0 +/* CQ Interrupt Modes */ +#define DLB_CQ_ISR_MODE_DIS 0 +#define DLB_CQ_ISR_MODE_MSI 1 +#define DLB_CQ_ISR_MODE_MSIX 2 +#define DLB_CQ_ISR_MODE_ADI 3 + +#define SYS_LDB_CQ_ISR_VECTOR 0x0000003F +#define SYS_LDB_CQ_ISR_VF 0x000003C0 +#define SYS_LDB_CQ_ISR_EN_CODE 0x00000C00 +#define SYS_LDB_CQ_ISR_RSVD0 0xFFFFF000 +#define SYS_LDB_CQ_ISR_VECTOR_LOC 0 +#define SYS_LDB_CQ_ISR_VF_LOC 6 +#define SYS_LDB_CQ_ISR_EN_CODE_LOC 10 +#define SYS_LDB_CQ_ISR_RSVD0_LOC 12 + +#define SYS_LDB_CQ2VF_PF_RO(x) \ + (0x10000f94 + (x) * 0x1000) +#define SYS_LDB_CQ2VF_PF_RO_RST 0x0 + +#define SYS_LDB_CQ2VF_PF_RO_VF 0x0000000F +#define SYS_LDB_CQ2VF_PF_RO_IS_PF 0x00000010 +#define SYS_LDB_CQ2VF_PF_RO_RO 0x00000020 +#define SYS_LDB_CQ2VF_PF_RO_RSVD0 0xFFFFFFC0 +#define SYS_LDB_CQ2VF_PF_RO_VF_LOC 0 +#define SYS_LDB_CQ2VF_PF_RO_IS_PF_LOC 4 +#define SYS_LDB_CQ2VF_PF_RO_RO_LOC 5 +#define SYS_LDB_CQ2VF_PF_RO_RSVD0_LOC 6 + +#define SYS_LDB_PP_V(x) \ + (0x10000f90 + (x) * 0x1000) +#define SYS_LDB_PP_V_RST 0x0 + +#define SYS_LDB_PP_V_PP_V 0x00000001 +#define SYS_LDB_PP_V_RSVD0 0xFFFFFFFE +#define SYS_LDB_PP_V_PP_V_LOC 0 +#define SYS_LDB_PP_V_RSVD0_LOC 1 + +#define SYS_LDB_PP2VDEV(x) \ + (0x10000f8c + (x) * 0x1000) +#define SYS_LDB_PP2VDEV_RST 0x0 + +#define SYS_LDB_PP2VDEV_VDEV 0x0000000F +#define SYS_LDB_PP2VDEV_RSVD0 0xFFFFFFF0 +#define SYS_LDB_PP2VDEV_VDEV_LOC 0 +#define SYS_LDB_PP2VDEV_RSVD0_LOC 4 + +#define SYS_LDB_PP2VAS(x) \ + (0x10000f88 + (x) * 0x1000) +#define SYS_LDB_PP2VAS_RST 0x0 + +#define SYS_LDB_PP2VAS_VAS 0x0000001F +#define SYS_LDB_PP2VAS_RSVD0 0xFFFFFFE0 +#define SYS_LDB_PP2VAS_VAS_LOC 0 +#define SYS_LDB_PP2VAS_RSVD0_LOC 5 + +#define SYS_LDB_CQ_ADDR_U(x) \ + (0x10000f84 + (x) * 0x1000) +#define SYS_LDB_CQ_ADDR_U_RST 0x0 + +#define SYS_LDB_CQ_ADDR_U_ADDR_U 0xFFFFFFFF +#define SYS_LDB_CQ_ADDR_U_ADDR_U_LOC 0 + +#define SYS_LDB_CQ_ADDR_L(x) \ + (0x10000f80 + (x) * 0x1000) +#define SYS_LDB_CQ_ADDR_L_RST 0x0 + +#define SYS_LDB_CQ_ADDR_L_RSVD0 0x0000003F +#define SYS_LDB_CQ_ADDR_L_ADDR_L 0xFFFFFFC0 +#define SYS_LDB_CQ_ADDR_L_RSVD0_LOC 0 +#define SYS_LDB_CQ_ADDR_L_ADDR_L_LOC 6 + +#define SYS_DIR_CQ_FMT(x) \ + (0x10000fec + (x) * 0x1000) +#define SYS_DIR_CQ_FMT_RST 0x0 + +#define SYS_DIR_CQ_FMT_KEEP_PF_PPID 0x00000001 +#define SYS_DIR_CQ_FMT_RSVD0 0xFFFFFFFE +#define SYS_DIR_CQ_FMT_KEEP_PF_PPID_LOC 0 +#define SYS_DIR_CQ_FMT_RSVD0_LOC 1 + +#define SYS_DIR_CQ_AI_DATA(x) \ + (0x10000fe8 + (x) * 0x1000) +#define SYS_DIR_CQ_AI_DATA_RST 0x0 + +#define SYS_DIR_CQ_AI_DATA_CQ_AI_DATA 0xFFFFFFFF +#define SYS_DIR_CQ_AI_DATA_CQ_AI_DATA_LOC 0 + +#define SYS_DIR_CQ_AI_ADDR(x) \ + (0x10000fe4 + (x) * 0x1000) +#define SYS_DIR_CQ_AI_ADDR_RST 0x0 + +#define SYS_DIR_CQ_AI_ADDR_RSVD1 0x00000003 +#define SYS_DIR_CQ_AI_ADDR_CQ_AI_ADDR 0x000FFFFC +#define SYS_DIR_CQ_AI_ADDR_RSVD0 0xFFF00000 +#define SYS_DIR_CQ_AI_ADDR_RSVD1_LOC 0 +#define SYS_DIR_CQ_AI_ADDR_CQ_AI_ADDR_LOC 2 +#define SYS_DIR_CQ_AI_ADDR_RSVD0_LOC 20 + +#define SYS_DIR_CQ_PASID(x) \ + (0x10000fe0 + (x) * 0x1000) +#define SYS_DIR_CQ_PASID_RST 0x0 + +#define SYS_DIR_CQ_PASID_PASID 0x000FFFFF +#define SYS_DIR_CQ_PASID_EXE_REQ 0x00100000 +#define SYS_DIR_CQ_PASID_PRIV_REQ 0x00200000 +#define SYS_DIR_CQ_PASID_FMT2 0x00400000 +#define SYS_DIR_CQ_PASID_RSVD0 0xFF800000 +#define SYS_DIR_CQ_PASID_PASID_LOC 0 +#define SYS_DIR_CQ_PASID_EXE_REQ_LOC 20 +#define SYS_DIR_CQ_PASID_PRIV_REQ_LOC 21 +#define SYS_DIR_CQ_PASID_FMT2_LOC 22 +#define SYS_DIR_CQ_PASID_RSVD0_LOC 23 + +#define SYS_DIR_CQ_AT(x) \ + (0x10000fdc + (x) * 0x1000) +#define SYS_DIR_CQ_AT_RST 0x0 + +#define SYS_DIR_CQ_AT_CQ_AT 0x00000003 +#define SYS_DIR_CQ_AT_RSVD0 0xFFFFFFFC +#define SYS_DIR_CQ_AT_CQ_AT_LOC 0 +#define SYS_DIR_CQ_AT_RSVD0_LOC 2 + +#define SYS_DIR_CQ_ISR(x) \ + (0x10000fd8 + (x) * 0x1000) +#define SYS_DIR_CQ_ISR_RST 0x0 + +#define SYS_DIR_CQ_ISR_VECTOR 0x0000003F +#define SYS_DIR_CQ_ISR_VF 0x000003C0 +#define SYS_DIR_CQ_ISR_EN_CODE 0x00000C00 +#define SYS_DIR_CQ_ISR_RSVD0 0xFFFFF000 +#define SYS_DIR_CQ_ISR_VECTOR_LOC 0 +#define SYS_DIR_CQ_ISR_VF_LOC 6 +#define SYS_DIR_CQ_ISR_EN_CODE_LOC 10 +#define SYS_DIR_CQ_ISR_RSVD0_LOC 12 + +#define SYS_DIR_CQ2VF_PF_RO(x) \ + (0x10000fd4 + (x) * 0x1000) +#define SYS_DIR_CQ2VF_PF_RO_RST 0x0 + +#define SYS_DIR_CQ2VF_PF_RO_VF 0x0000000F +#define SYS_DIR_CQ2VF_PF_RO_IS_PF 0x00000010 +#define SYS_DIR_CQ2VF_PF_RO_RO 0x00000020 +#define SYS_DIR_CQ2VF_PF_RO_RSVD0 0xFFFFFFC0 +#define SYS_DIR_CQ2VF_PF_RO_VF_LOC 0 +#define SYS_DIR_CQ2VF_PF_RO_IS_PF_LOC 4 +#define SYS_DIR_CQ2VF_PF_RO_RO_LOC 5 +#define SYS_DIR_CQ2VF_PF_RO_RSVD0_LOC 6 + +#define SYS_DIR_PP_V(x) \ + (0x10000fd0 + (x) * 0x1000) +#define SYS_DIR_PP_V_RST 0x0 + +#define SYS_DIR_PP_V_PP_V 0x00000001 +#define SYS_DIR_PP_V_RSVD0 0xFFFFFFFE +#define SYS_DIR_PP_V_PP_V_LOC 0 +#define SYS_DIR_PP_V_RSVD0_LOC 1 + +#define SYS_DIR_PP2VDEV(x) \ + (0x10000fcc + (x) * 0x1000) +#define SYS_DIR_PP2VDEV_RST 0x0 + +#define SYS_DIR_PP2VDEV_VDEV 0x0000000F +#define SYS_DIR_PP2VDEV_RSVD0 0xFFFFFFF0 +#define SYS_DIR_PP2VDEV_VDEV_LOC 0 +#define SYS_DIR_PP2VDEV_RSVD0_LOC 4 + +#define SYS_DIR_PP2VAS(x) \ + (0x10000fc8 + (x) * 0x1000) +#define SYS_DIR_PP2VAS_RST 0x0 + +#define SYS_DIR_PP2VAS_VAS 0x0000001F +#define SYS_DIR_PP2VAS_RSVD0 0xFFFFFFE0 +#define SYS_DIR_PP2VAS_VAS_LOC 0 +#define SYS_DIR_PP2VAS_RSVD0_LOC 5 + +#define SYS_DIR_CQ_ADDR_U(x) \ + (0x10000fc4 + (x) * 0x1000) +#define SYS_DIR_CQ_ADDR_U_RST 0x0 + +#define SYS_DIR_CQ_ADDR_U_ADDR_U 0xFFFFFFFF +#define SYS_DIR_CQ_ADDR_U_ADDR_U_LOC 0 + +#define SYS_DIR_CQ_ADDR_L(x) \ + (0x10000fc0 + (x) * 0x1000) +#define SYS_DIR_CQ_ADDR_L_RST 0x0 + +#define SYS_DIR_CQ_ADDR_L_RSVD0 0x0000003F +#define SYS_DIR_CQ_ADDR_L_ADDR_L 0xFFFFFFC0 +#define SYS_DIR_CQ_ADDR_L_RSVD0_LOC 0 +#define SYS_DIR_CQ_ADDR_L_ADDR_L_LOC 6 + +#define SYS_PM_SMON_COMP_MASK1 0x10003024 +#define SYS_PM_SMON_COMP_MASK1_RST 0xffffffff + +#define SYS_PM_SMON_COMP_MASK1_COMP_MASK1 0xFFFFFFFF +#define SYS_PM_SMON_COMP_MASK1_COMP_MASK1_LOC 0 + +#define SYS_PM_SMON_COMP_MASK0 0x10003020 +#define SYS_PM_SMON_COMP_MASK0_RST 0xffffffff + +#define SYS_PM_SMON_COMP_MASK0_COMP_MASK0 0xFFFFFFFF +#define SYS_PM_SMON_COMP_MASK0_COMP_MASK0_LOC 0 + +#define SYS_PM_SMON_MAX_TMR 0x1000301c +#define SYS_PM_SMON_MAX_TMR_RST 0x0 + +#define SYS_PM_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define SYS_PM_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define SYS_PM_SMON_TMR 0x10003018 +#define SYS_PM_SMON_TMR_RST 0x0 + +#define SYS_PM_SMON_TMR_TIMER_VAL 0xFFFFFFFF +#define SYS_PM_SMON_TMR_TIMER_VAL_LOC 0 + +#define SYS_PM_SMON_ACTIVITYCNTR1 0x10003014 +#define SYS_PM_SMON_ACTIVITYCNTR1_RST 0x0 + +#define SYS_PM_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define SYS_PM_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define SYS_PM_SMON_ACTIVITYCNTR0 0x10003010 +#define SYS_PM_SMON_ACTIVITYCNTR0_RST 0x0 + +#define SYS_PM_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define SYS_PM_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define SYS_PM_SMON_COMPARE1 0x1000300c +#define SYS_PM_SMON_COMPARE1_RST 0x0 + +#define SYS_PM_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define SYS_PM_SMON_COMPARE1_COMPARE1_LOC 0 + +#define SYS_PM_SMON_COMPARE0 0x10003008 +#define SYS_PM_SMON_COMPARE0_RST 0x0 + +#define SYS_PM_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define SYS_PM_SMON_COMPARE0_COMPARE0_LOC 0 + +#define SYS_PM_SMON_CFG1 0x10003004 +#define SYS_PM_SMON_CFG1_RST 0x0 + +#define SYS_PM_SMON_CFG1_MODE0 0x000000FF +#define SYS_PM_SMON_CFG1_MODE1 0x0000FF00 +#define SYS_PM_SMON_CFG1_RSVD 0xFFFF0000 +#define SYS_PM_SMON_CFG1_MODE0_LOC 0 +#define SYS_PM_SMON_CFG1_MODE1_LOC 8 +#define SYS_PM_SMON_CFG1_RSVD_LOC 16 + +#define SYS_PM_SMON_CFG0 0x10003000 +#define SYS_PM_SMON_CFG0_RST 0x40000000 + +#define SYS_PM_SMON_CFG0_SMON_ENABLE 0x00000001 +#define SYS_PM_SMON_CFG0_RSVD2 0x0000000E +#define SYS_PM_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define SYS_PM_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define SYS_PM_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define SYS_PM_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define SYS_PM_SMON_CFG0_SMON_MODE 0x0000F000 +#define SYS_PM_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define SYS_PM_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define SYS_PM_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define SYS_PM_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define SYS_PM_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define SYS_PM_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define SYS_PM_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define SYS_PM_SMON_CFG0_RSVD1 0x00800000 +#define SYS_PM_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define SYS_PM_SMON_CFG0_RSVD0 0x20000000 +#define SYS_PM_SMON_CFG0_VERSION 0xC0000000 +#define SYS_PM_SMON_CFG0_SMON_ENABLE_LOC 0 +#define SYS_PM_SMON_CFG0_RSVD2_LOC 1 +#define SYS_PM_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define SYS_PM_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define SYS_PM_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define SYS_PM_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define SYS_PM_SMON_CFG0_SMON_MODE_LOC 12 +#define SYS_PM_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define SYS_PM_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define SYS_PM_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define SYS_PM_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define SYS_PM_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define SYS_PM_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define SYS_PM_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define SYS_PM_SMON_CFG0_RSVD1_LOC 23 +#define SYS_PM_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define SYS_PM_SMON_CFG0_RSVD0_LOC 29 +#define SYS_PM_SMON_CFG0_VERSION_LOC 30 + +#define SYS_SMON_COMP_MASK1(x) \ + (0x18002024 + (x) * 0x40) +#define SYS_SMON_COMP_MASK1_RST 0xffffffff + +#define SYS_SMON_COMP_MASK1_COMP_MASK1 0xFFFFFFFF +#define SYS_SMON_COMP_MASK1_COMP_MASK1_LOC 0 + +#define SYS_SMON_COMP_MASK0(x) \ + (0x18002020 + (x) * 0x40) +#define SYS_SMON_COMP_MASK0_RST 0xffffffff + +#define SYS_SMON_COMP_MASK0_COMP_MASK0 0xFFFFFFFF +#define SYS_SMON_COMP_MASK0_COMP_MASK0_LOC 0 + +#define SYS_SMON_MAX_TMR(x) \ + (0x1800201c + (x) * 0x40) +#define SYS_SMON_MAX_TMR_RST 0x0 + +#define SYS_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define SYS_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define SYS_SMON_TMR(x) \ + (0x18002018 + (x) * 0x40) +#define SYS_SMON_TMR_RST 0x0 + +#define SYS_SMON_TMR_TIMER_VAL 0xFFFFFFFF +#define SYS_SMON_TMR_TIMER_VAL_LOC 0 + +#define SYS_SMON_ACTIVITYCNTR1(x) \ + (0x18002014 + (x) * 0x40) +#define SYS_SMON_ACTIVITYCNTR1_RST 0x0 + +#define SYS_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define SYS_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define SYS_SMON_ACTIVITYCNTR0(x) \ + (0x18002010 + (x) * 0x40) +#define SYS_SMON_ACTIVITYCNTR0_RST 0x0 + +#define SYS_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define SYS_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define SYS_SMON_COMPARE1(x) \ + (0x1800200c + (x) * 0x40) +#define SYS_SMON_COMPARE1_RST 0x0 + +#define SYS_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define SYS_SMON_COMPARE1_COMPARE1_LOC 0 + +#define SYS_SMON_COMPARE0(x) \ + (0x18002008 + (x) * 0x40) +#define SYS_SMON_COMPARE0_RST 0x0 + +#define SYS_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define SYS_SMON_COMPARE0_COMPARE0_LOC 0 + +#define SYS_SMON_CFG1(x) \ + (0x18002004 + (x) * 0x40) +#define SYS_SMON_CFG1_RST 0x0 + +#define SYS_SMON_CFG1_MODE0 0x000000FF +#define SYS_SMON_CFG1_MODE1 0x0000FF00 +#define SYS_SMON_CFG1_RSVD 0xFFFF0000 +#define SYS_SMON_CFG1_MODE0_LOC 0 +#define SYS_SMON_CFG1_MODE1_LOC 8 +#define SYS_SMON_CFG1_RSVD_LOC 16 + +#define SYS_SMON_CFG0(x) \ + (0x18002000 + (x) * 0x40) +#define SYS_SMON_CFG0_RST 0x40000000 + +#define SYS_SMON_CFG0_SMON_ENABLE 0x00000001 +#define SYS_SMON_CFG0_RSVD2 0x0000000E +#define SYS_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define SYS_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define SYS_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define SYS_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define SYS_SMON_CFG0_SMON_MODE 0x0000F000 +#define SYS_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define SYS_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define SYS_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define SYS_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define SYS_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define SYS_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define SYS_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define SYS_SMON_CFG0_RSVD1 0x00800000 +#define SYS_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define SYS_SMON_CFG0_RSVD0 0x20000000 +#define SYS_SMON_CFG0_VERSION 0xC0000000 +#define SYS_SMON_CFG0_SMON_ENABLE_LOC 0 +#define SYS_SMON_CFG0_RSVD2_LOC 1 +#define SYS_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define SYS_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define SYS_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define SYS_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define SYS_SMON_CFG0_SMON_MODE_LOC 12 +#define SYS_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define SYS_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define SYS_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define SYS_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define SYS_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define SYS_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define SYS_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define SYS_SMON_CFG0_RSVD1_LOC 23 +#define SYS_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define SYS_SMON_CFG0_RSVD0_LOC 29 +#define SYS_SMON_CFG0_VERSION_LOC 30 + +#define SYS_INGRESS_ALARM_ENBL 0x10000300 +#define SYS_INGRESS_ALARM_ENBL_RST 0x0 + +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_HCW 0x00000001 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_PP 0x00000002 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_PASID 0x00000004 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_QID 0x00000008 +#define SYS_INGRESS_ALARM_ENBL_DISABLED_QID 0x00000010 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_LDB_QID_CFG 0x00000020 +#define SYS_INGRESS_ALARM_ENBL_RSVD0 0xFFFFFFC0 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_HCW_LOC 0 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_PP_LOC 1 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_PASID_LOC 2 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_QID_LOC 3 +#define SYS_INGRESS_ALARM_ENBL_DISABLED_QID_LOC 4 +#define SYS_INGRESS_ALARM_ENBL_ILLEGAL_LDB_QID_CFG_LOC 5 +#define SYS_INGRESS_ALARM_ENBL_RSVD0_LOC 6 + +#define SYS_MSIX_ACK 0x10000400 +#define SYS_MSIX_ACK_RST 0x0 + +#define SYS_MSIX_ACK_MSIX_0_ACK 0x00000001 +#define SYS_MSIX_ACK_MSIX_1_ACK 0x00000002 +#define SYS_MSIX_ACK_RSVD0 0xFFFFFFFC +#define SYS_MSIX_ACK_MSIX_0_ACK_LOC 0 +#define SYS_MSIX_ACK_MSIX_1_ACK_LOC 1 +#define SYS_MSIX_ACK_RSVD0_LOC 2 + +#define SYS_MSIX_PASSTHRU 0x10000404 +#define SYS_MSIX_PASSTHRU_RST 0x0 + +#define SYS_MSIX_PASSTHRU_MSIX_0_PASSTHRU 0x00000001 +#define SYS_MSIX_PASSTHRU_MSIX_1_PASSTHRU 0x00000002 +#define SYS_MSIX_PASSTHRU_RSVD0 0xFFFFFFFC +#define SYS_MSIX_PASSTHRU_MSIX_0_PASSTHRU_LOC 0 +#define SYS_MSIX_PASSTHRU_MSIX_1_PASSTHRU_LOC 1 +#define SYS_MSIX_PASSTHRU_RSVD0_LOC 2 + +#define SYS_MSIX_MODE 0x10000408 +#define SYS_MSIX_MODE_RST 0x0 +/* MSI-X Modes */ +#define DLB_MSIX_MODE_PACKED 0 +#define DLB_MSIX_MODE_COMPRESSED 1 + +#define SYS_MSIX_MODE_MODE 0x00000001 +#define SYS_MSIX_MODE_POLL_MODE 0x00000002 +#define SYS_MSIX_MODE_POLL_MASK 0x00000004 +#define SYS_MSIX_MODE_POLL_LOCK 0x00000008 +#define SYS_MSIX_MODE_RSVD0 0xFFFFFFF0 +#define SYS_MSIX_MODE_MODE_LOC 0 +#define SYS_MSIX_MODE_POLL_MODE_LOC 1 +#define SYS_MSIX_MODE_POLL_MASK_LOC 2 +#define SYS_MSIX_MODE_POLL_LOCK_LOC 3 +#define SYS_MSIX_MODE_RSVD0_LOC 4 + +#define SYS_DIR_CQ_31_0_OCC_INT_STS 0x10000440 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_RST 0x0 + +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_0_OCC_INT 0x00000001 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_1_OCC_INT 0x00000002 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_2_OCC_INT 0x00000004 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_3_OCC_INT 0x00000008 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_4_OCC_INT 0x00000010 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_5_OCC_INT 0x00000020 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_6_OCC_INT 0x00000040 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_7_OCC_INT 0x00000080 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_8_OCC_INT 0x00000100 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_9_OCC_INT 0x00000200 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_10_OCC_INT 0x00000400 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_11_OCC_INT 0x00000800 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_12_OCC_INT 0x00001000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_13_OCC_INT 0x00002000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_14_OCC_INT 0x00004000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_15_OCC_INT 0x00008000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_16_OCC_INT 0x00010000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_17_OCC_INT 0x00020000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_18_OCC_INT 0x00040000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_19_OCC_INT 0x00080000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_20_OCC_INT 0x00100000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_21_OCC_INT 0x00200000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_22_OCC_INT 0x00400000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_23_OCC_INT 0x00800000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_24_OCC_INT 0x01000000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_25_OCC_INT 0x02000000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_26_OCC_INT 0x04000000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_27_OCC_INT 0x08000000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_28_OCC_INT 0x10000000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_29_OCC_INT 0x20000000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_30_OCC_INT 0x40000000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_31_OCC_INT 0x80000000 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_0_OCC_INT_LOC 0 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_1_OCC_INT_LOC 1 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_2_OCC_INT_LOC 2 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_3_OCC_INT_LOC 3 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_4_OCC_INT_LOC 4 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_5_OCC_INT_LOC 5 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_6_OCC_INT_LOC 6 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_7_OCC_INT_LOC 7 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_8_OCC_INT_LOC 8 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_9_OCC_INT_LOC 9 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_10_OCC_INT_LOC 10 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_11_OCC_INT_LOC 11 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_12_OCC_INT_LOC 12 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_13_OCC_INT_LOC 13 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_14_OCC_INT_LOC 14 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_15_OCC_INT_LOC 15 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_16_OCC_INT_LOC 16 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_17_OCC_INT_LOC 17 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_18_OCC_INT_LOC 18 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_19_OCC_INT_LOC 19 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_20_OCC_INT_LOC 20 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_21_OCC_INT_LOC 21 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_22_OCC_INT_LOC 22 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_23_OCC_INT_LOC 23 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_24_OCC_INT_LOC 24 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_25_OCC_INT_LOC 25 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_26_OCC_INT_LOC 26 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_27_OCC_INT_LOC 27 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_28_OCC_INT_LOC 28 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_29_OCC_INT_LOC 29 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_30_OCC_INT_LOC 30 +#define SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_31_OCC_INT_LOC 31 + +#define SYS_DIR_CQ_63_32_OCC_INT_STS 0x10000444 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_RST 0x0 + +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_32_OCC_INT 0x00000001 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_33_OCC_INT 0x00000002 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_34_OCC_INT 0x00000004 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_35_OCC_INT 0x00000008 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_36_OCC_INT 0x00000010 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_37_OCC_INT 0x00000020 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_38_OCC_INT 0x00000040 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_39_OCC_INT 0x00000080 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_40_OCC_INT 0x00000100 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_41_OCC_INT 0x00000200 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_42_OCC_INT 0x00000400 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_43_OCC_INT 0x00000800 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_44_OCC_INT 0x00001000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_45_OCC_INT 0x00002000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_46_OCC_INT 0x00004000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_47_OCC_INT 0x00008000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_48_OCC_INT 0x00010000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_49_OCC_INT 0x00020000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_50_OCC_INT 0x00040000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_51_OCC_INT 0x00080000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_52_OCC_INT 0x00100000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_53_OCC_INT 0x00200000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_54_OCC_INT 0x00400000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_55_OCC_INT 0x00800000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_56_OCC_INT 0x01000000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_57_OCC_INT 0x02000000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_58_OCC_INT 0x04000000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_59_OCC_INT 0x08000000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_60_OCC_INT 0x10000000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_61_OCC_INT 0x20000000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_62_OCC_INT 0x40000000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_63_OCC_INT 0x80000000 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_32_OCC_INT_LOC 0 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_33_OCC_INT_LOC 1 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_34_OCC_INT_LOC 2 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_35_OCC_INT_LOC 3 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_36_OCC_INT_LOC 4 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_37_OCC_INT_LOC 5 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_38_OCC_INT_LOC 6 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_39_OCC_INT_LOC 7 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_40_OCC_INT_LOC 8 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_41_OCC_INT_LOC 9 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_42_OCC_INT_LOC 10 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_43_OCC_INT_LOC 11 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_44_OCC_INT_LOC 12 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_45_OCC_INT_LOC 13 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_46_OCC_INT_LOC 14 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_47_OCC_INT_LOC 15 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_48_OCC_INT_LOC 16 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_49_OCC_INT_LOC 17 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_50_OCC_INT_LOC 18 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_51_OCC_INT_LOC 19 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_52_OCC_INT_LOC 20 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_53_OCC_INT_LOC 21 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_54_OCC_INT_LOC 22 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_55_OCC_INT_LOC 23 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_56_OCC_INT_LOC 24 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_57_OCC_INT_LOC 25 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_58_OCC_INT_LOC 26 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_59_OCC_INT_LOC 27 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_60_OCC_INT_LOC 28 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_61_OCC_INT_LOC 29 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_62_OCC_INT_LOC 30 +#define SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_63_OCC_INT_LOC 31 + +#define SYS_LDB_CQ_31_0_OCC_INT_STS 0x10000460 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_RST 0x0 + +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_0_OCC_INT 0x00000001 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_1_OCC_INT 0x00000002 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_2_OCC_INT 0x00000004 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_3_OCC_INT 0x00000008 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_4_OCC_INT 0x00000010 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_5_OCC_INT 0x00000020 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_6_OCC_INT 0x00000040 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_7_OCC_INT 0x00000080 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_8_OCC_INT 0x00000100 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_9_OCC_INT 0x00000200 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_10_OCC_INT 0x00000400 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_11_OCC_INT 0x00000800 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_12_OCC_INT 0x00001000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_13_OCC_INT 0x00002000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_14_OCC_INT 0x00004000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_15_OCC_INT 0x00008000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_16_OCC_INT 0x00010000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_17_OCC_INT 0x00020000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_18_OCC_INT 0x00040000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_19_OCC_INT 0x00080000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_20_OCC_INT 0x00100000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_21_OCC_INT 0x00200000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_22_OCC_INT 0x00400000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_23_OCC_INT 0x00800000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_24_OCC_INT 0x01000000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_25_OCC_INT 0x02000000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_26_OCC_INT 0x04000000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_27_OCC_INT 0x08000000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_28_OCC_INT 0x10000000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_29_OCC_INT 0x20000000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_30_OCC_INT 0x40000000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_31_OCC_INT 0x80000000 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_0_OCC_INT_LOC 0 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_1_OCC_INT_LOC 1 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_2_OCC_INT_LOC 2 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_3_OCC_INT_LOC 3 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_4_OCC_INT_LOC 4 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_5_OCC_INT_LOC 5 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_6_OCC_INT_LOC 6 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_7_OCC_INT_LOC 7 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_8_OCC_INT_LOC 8 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_9_OCC_INT_LOC 9 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_10_OCC_INT_LOC 10 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_11_OCC_INT_LOC 11 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_12_OCC_INT_LOC 12 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_13_OCC_INT_LOC 13 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_14_OCC_INT_LOC 14 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_15_OCC_INT_LOC 15 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_16_OCC_INT_LOC 16 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_17_OCC_INT_LOC 17 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_18_OCC_INT_LOC 18 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_19_OCC_INT_LOC 19 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_20_OCC_INT_LOC 20 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_21_OCC_INT_LOC 21 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_22_OCC_INT_LOC 22 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_23_OCC_INT_LOC 23 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_24_OCC_INT_LOC 24 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_25_OCC_INT_LOC 25 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_26_OCC_INT_LOC 26 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_27_OCC_INT_LOC 27 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_28_OCC_INT_LOC 28 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_29_OCC_INT_LOC 29 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_30_OCC_INT_LOC 30 +#define SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_31_OCC_INT_LOC 31 + +#define SYS_LDB_CQ_63_32_OCC_INT_STS 0x10000464 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_RST 0x0 + +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_32_OCC_INT 0x00000001 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_33_OCC_INT 0x00000002 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_34_OCC_INT 0x00000004 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_35_OCC_INT 0x00000008 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_36_OCC_INT 0x00000010 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_37_OCC_INT 0x00000020 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_38_OCC_INT 0x00000040 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_39_OCC_INT 0x00000080 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_40_OCC_INT 0x00000100 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_41_OCC_INT 0x00000200 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_42_OCC_INT 0x00000400 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_43_OCC_INT 0x00000800 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_44_OCC_INT 0x00001000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_45_OCC_INT 0x00002000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_46_OCC_INT 0x00004000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_47_OCC_INT 0x00008000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_48_OCC_INT 0x00010000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_49_OCC_INT 0x00020000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_50_OCC_INT 0x00040000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_51_OCC_INT 0x00080000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_52_OCC_INT 0x00100000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_53_OCC_INT 0x00200000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_54_OCC_INT 0x00400000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_55_OCC_INT 0x00800000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_56_OCC_INT 0x01000000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_57_OCC_INT 0x02000000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_58_OCC_INT 0x04000000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_59_OCC_INT 0x08000000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_60_OCC_INT 0x10000000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_61_OCC_INT 0x20000000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_62_OCC_INT 0x40000000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_63_OCC_INT 0x80000000 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_32_OCC_INT_LOC 0 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_33_OCC_INT_LOC 1 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_34_OCC_INT_LOC 2 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_35_OCC_INT_LOC 3 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_36_OCC_INT_LOC 4 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_37_OCC_INT_LOC 5 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_38_OCC_INT_LOC 6 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_39_OCC_INT_LOC 7 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_40_OCC_INT_LOC 8 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_41_OCC_INT_LOC 9 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_42_OCC_INT_LOC 10 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_43_OCC_INT_LOC 11 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_44_OCC_INT_LOC 12 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_45_OCC_INT_LOC 13 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_46_OCC_INT_LOC 14 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_47_OCC_INT_LOC 15 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_48_OCC_INT_LOC 16 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_49_OCC_INT_LOC 17 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_50_OCC_INT_LOC 18 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_51_OCC_INT_LOC 19 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_52_OCC_INT_LOC 20 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_53_OCC_INT_LOC 21 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_54_OCC_INT_LOC 22 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_55_OCC_INT_LOC 23 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_56_OCC_INT_LOC 24 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_57_OCC_INT_LOC 25 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_58_OCC_INT_LOC 26 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_59_OCC_INT_LOC 27 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_60_OCC_INT_LOC 28 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_61_OCC_INT_LOC 29 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_62_OCC_INT_LOC 30 +#define SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_63_OCC_INT_LOC 31 + +#define SYS_DIR_CQ_OPT_CLR 0x100004c0 +#define SYS_DIR_CQ_OPT_CLR_RST 0x0 + +#define SYS_DIR_CQ_OPT_CLR_CQ 0x0000003F +#define SYS_DIR_CQ_OPT_CLR_RSVD0 0xFFFFFFC0 +#define SYS_DIR_CQ_OPT_CLR_CQ_LOC 0 +#define SYS_DIR_CQ_OPT_CLR_RSVD0_LOC 6 + +#define SYS_ALARM_HW_SYND 0x1000050c +#define SYS_ALARM_HW_SYND_RST 0x0 + +#define SYS_ALARM_HW_SYND_SYNDROME 0x000000FF +#define SYS_ALARM_HW_SYND_RTYPE 0x00000300 +#define SYS_ALARM_HW_SYND_ALARM 0x00000400 +#define SYS_ALARM_HW_SYND_CWD 0x00000800 +#define SYS_ALARM_HW_SYND_VF_PF_MB 0x00001000 +#define SYS_ALARM_HW_SYND_RSVD0 0x00002000 +#define SYS_ALARM_HW_SYND_CLS 0x0000C000 +#define SYS_ALARM_HW_SYND_AID 0x003F0000 +#define SYS_ALARM_HW_SYND_UNIT 0x03C00000 +#define SYS_ALARM_HW_SYND_SOURCE 0x3C000000 +#define SYS_ALARM_HW_SYND_MORE 0x40000000 +#define SYS_ALARM_HW_SYND_VALID 0x80000000 +#define SYS_ALARM_HW_SYND_SYNDROME_LOC 0 +#define SYS_ALARM_HW_SYND_RTYPE_LOC 8 +#define SYS_ALARM_HW_SYND_ALARM_LOC 10 +#define SYS_ALARM_HW_SYND_CWD_LOC 11 +#define SYS_ALARM_HW_SYND_VF_PF_MB_LOC 12 +#define SYS_ALARM_HW_SYND_RSVD0_LOC 13 +#define SYS_ALARM_HW_SYND_CLS_LOC 14 +#define SYS_ALARM_HW_SYND_AID_LOC 16 +#define SYS_ALARM_HW_SYND_UNIT_LOC 22 +#define SYS_ALARM_HW_SYND_SOURCE_LOC 26 +#define SYS_ALARM_HW_SYND_MORE_LOC 30 +#define SYS_ALARM_HW_SYND_VALID_LOC 31 + +#define AQED_QID_FID_LIM(x) \ + (0x20000000 + (x) * 0x1000) +#define AQED_QID_FID_LIM_RST 0x7ff + +#define AQED_QID_FID_LIM_QID_FID_LIMIT 0x00001FFF +#define AQED_QID_FID_LIM_RSVD0 0xFFFFE000 +#define AQED_QID_FID_LIM_QID_FID_LIMIT_LOC 0 +#define AQED_QID_FID_LIM_RSVD0_LOC 13 + +#define AQED_QID_HID_WIDTH(x) \ + (0x20080000 + (x) * 0x1000) +#define AQED_QID_HID_WIDTH_RST 0x0 + +#define AQED_QID_HID_WIDTH_COMPRESS_CODE 0x00000007 +#define AQED_QID_HID_WIDTH_RSVD0 0xFFFFFFF8 +#define AQED_QID_HID_WIDTH_COMPRESS_CODE_LOC 0 +#define AQED_QID_HID_WIDTH_RSVD0_LOC 3 + +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0 0x24000004 +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_RST 0xfefcfaf8 + +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI0 0x000000FF +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI1 0x0000FF00 +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI2 0x00FF0000 +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI3 0xFF000000 +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI0_LOC 0 +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI1_LOC 8 +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI2_LOC 16 +#define AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI3_LOC 24 + +#define AQED_SMON_ACTIVITYCNTR0 0x2c00004c +#define AQED_SMON_ACTIVITYCNTR0_RST 0x0 + +#define AQED_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define AQED_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define AQED_SMON_ACTIVITYCNTR1 0x2c000050 +#define AQED_SMON_ACTIVITYCNTR1_RST 0x0 + +#define AQED_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define AQED_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define AQED_SMON_COMPARE0 0x2c000054 +#define AQED_SMON_COMPARE0_RST 0x0 + +#define AQED_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define AQED_SMON_COMPARE0_COMPARE0_LOC 0 + +#define AQED_SMON_COMPARE1 0x2c000058 +#define AQED_SMON_COMPARE1_RST 0x0 + +#define AQED_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define AQED_SMON_COMPARE1_COMPARE1_LOC 0 + +#define AQED_SMON_CFG0 0x2c00005c +#define AQED_SMON_CFG0_RST 0x40000000 + +#define AQED_SMON_CFG0_SMON_ENABLE 0x00000001 +#define AQED_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define AQED_SMON_CFG0_RSVZ0 0x0000000C +#define AQED_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define AQED_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define AQED_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define AQED_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define AQED_SMON_CFG0_SMON_MODE 0x0000F000 +#define AQED_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define AQED_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define AQED_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define AQED_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define AQED_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define AQED_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define AQED_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define AQED_SMON_CFG0_RSVZ1 0x00800000 +#define AQED_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define AQED_SMON_CFG0_RSVZ2 0x20000000 +#define AQED_SMON_CFG0_VERSION 0xC0000000 +#define AQED_SMON_CFG0_SMON_ENABLE_LOC 0 +#define AQED_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define AQED_SMON_CFG0_RSVZ0_LOC 2 +#define AQED_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define AQED_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define AQED_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define AQED_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define AQED_SMON_CFG0_SMON_MODE_LOC 12 +#define AQED_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define AQED_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define AQED_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define AQED_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define AQED_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define AQED_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define AQED_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define AQED_SMON_CFG0_RSVZ1_LOC 23 +#define AQED_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define AQED_SMON_CFG0_RSVZ2_LOC 29 +#define AQED_SMON_CFG0_VERSION_LOC 30 + +#define AQED_SMON_CFG1 0x2c000060 +#define AQED_SMON_CFG1_RST 0x0 + +#define AQED_SMON_CFG1_MODE0 0x000000FF +#define AQED_SMON_CFG1_MODE1 0x0000FF00 +#define AQED_SMON_CFG1_RSVZ0 0xFFFF0000 +#define AQED_SMON_CFG1_MODE0_LOC 0 +#define AQED_SMON_CFG1_MODE1_LOC 8 +#define AQED_SMON_CFG1_RSVZ0_LOC 16 + +#define AQED_SMON_MAX_TMR 0x2c000064 +#define AQED_SMON_MAX_TMR_RST 0x0 + +#define AQED_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define AQED_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define AQED_SMON_TMR 0x2c000068 +#define AQED_SMON_TMR_RST 0x0 + +#define AQED_SMON_TMR_TIMER 0xFFFFFFFF +#define AQED_SMON_TMR_TIMER_LOC 0 + +#define ATM_QID2CQIDIX_00(x) \ + (0x30080000 + (x) * 0x1000) +#define ATM_QID2CQIDIX_00_RST 0x0 +#define ATM_QID2CQIDIX(x, y) \ + (ATM_QID2CQIDIX_00(x) + 0x80000 * (y)) +#define ATM_QID2CQIDIX_NUM 16 + +#define ATM_QID2CQIDIX_00_CQ_P0 0x000000FF +#define ATM_QID2CQIDIX_00_CQ_P1 0x0000FF00 +#define ATM_QID2CQIDIX_00_CQ_P2 0x00FF0000 +#define ATM_QID2CQIDIX_00_CQ_P3 0xFF000000 +#define ATM_QID2CQIDIX_00_CQ_P0_LOC 0 +#define ATM_QID2CQIDIX_00_CQ_P1_LOC 8 +#define ATM_QID2CQIDIX_00_CQ_P2_LOC 16 +#define ATM_QID2CQIDIX_00_CQ_P3_LOC 24 + +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN 0x34000004 +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_RST 0xfffefdfc + +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN0 0x000000FF +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN1 0x0000FF00 +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN2 0x00FF0000 +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN3 0xFF000000 +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN0_LOC 0 +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN1_LOC 8 +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN2_LOC 16 +#define ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN3_LOC 24 + +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN 0x34000008 +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_RST 0xfffefdfc + +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN0 0x000000FF +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN1 0x0000FF00 +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN2 0x00FF0000 +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN3 0xFF000000 +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN0_LOC 0 +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN1_LOC 8 +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN2_LOC 16 +#define ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN3_LOC 24 + +#define ATM_SMON_ACTIVITYCNTR0 0x3c000050 +#define ATM_SMON_ACTIVITYCNTR0_RST 0x0 + +#define ATM_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define ATM_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define ATM_SMON_ACTIVITYCNTR1 0x3c000054 +#define ATM_SMON_ACTIVITYCNTR1_RST 0x0 + +#define ATM_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define ATM_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define ATM_SMON_COMPARE0 0x3c000058 +#define ATM_SMON_COMPARE0_RST 0x0 + +#define ATM_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define ATM_SMON_COMPARE0_COMPARE0_LOC 0 + +#define ATM_SMON_COMPARE1 0x3c00005c +#define ATM_SMON_COMPARE1_RST 0x0 + +#define ATM_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define ATM_SMON_COMPARE1_COMPARE1_LOC 0 + +#define ATM_SMON_CFG0 0x3c000060 +#define ATM_SMON_CFG0_RST 0x40000000 + +#define ATM_SMON_CFG0_SMON_ENABLE 0x00000001 +#define ATM_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define ATM_SMON_CFG0_RSVZ0 0x0000000C +#define ATM_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define ATM_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define ATM_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define ATM_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define ATM_SMON_CFG0_SMON_MODE 0x0000F000 +#define ATM_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define ATM_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define ATM_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define ATM_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define ATM_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define ATM_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define ATM_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define ATM_SMON_CFG0_RSVZ1 0x00800000 +#define ATM_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define ATM_SMON_CFG0_RSVZ2 0x20000000 +#define ATM_SMON_CFG0_VERSION 0xC0000000 +#define ATM_SMON_CFG0_SMON_ENABLE_LOC 0 +#define ATM_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define ATM_SMON_CFG0_RSVZ0_LOC 2 +#define ATM_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define ATM_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define ATM_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define ATM_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define ATM_SMON_CFG0_SMON_MODE_LOC 12 +#define ATM_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define ATM_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define ATM_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define ATM_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define ATM_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define ATM_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define ATM_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define ATM_SMON_CFG0_RSVZ1_LOC 23 +#define ATM_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define ATM_SMON_CFG0_RSVZ2_LOC 29 +#define ATM_SMON_CFG0_VERSION_LOC 30 + +#define ATM_SMON_CFG1 0x3c000064 +#define ATM_SMON_CFG1_RST 0x0 + +#define ATM_SMON_CFG1_MODE0 0x000000FF +#define ATM_SMON_CFG1_MODE1 0x0000FF00 +#define ATM_SMON_CFG1_RSVZ0 0xFFFF0000 +#define ATM_SMON_CFG1_MODE0_LOC 0 +#define ATM_SMON_CFG1_MODE1_LOC 8 +#define ATM_SMON_CFG1_RSVZ0_LOC 16 + +#define ATM_SMON_MAX_TMR 0x3c000068 +#define ATM_SMON_MAX_TMR_RST 0x0 + +#define ATM_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define ATM_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define ATM_SMON_TMR 0x3c00006c +#define ATM_SMON_TMR_RST 0x0 + +#define ATM_SMON_TMR_TIMER 0xFFFFFFFF +#define ATM_SMON_TMR_TIMER_LOC 0 #define CHP_CFG_DIR_VAS_CRD(x) \ (0x40000000 + (x) * 0x1000) #define CHP_CFG_DIR_VAS_CRD_RST 0x0 -#define CHP_CFG_DIR_VAS_CRD_COUNT 0x00003FFF -#define CHP_CFG_DIR_VAS_CRD_RSVD0 0xFFFFC000 -#define CHP_CFG_DIR_VAS_CRD_COUNT_LOC 0 -#define CHP_CFG_DIR_VAS_CRD_RSVD0_LOC 14 +#define CHP_CFG_DIR_VAS_CRD_COUNT 0x00003FFF +#define CHP_CFG_DIR_VAS_CRD_RSVD0 0xFFFFC000 +#define CHP_CFG_DIR_VAS_CRD_COUNT_LOC 0 +#define CHP_CFG_DIR_VAS_CRD_RSVD0_LOC 14 + +#define CHP_CFG_LDB_VAS_CRD(x) \ + (0x40080000 + (x) * 0x1000) +#define CHP_CFG_LDB_VAS_CRD_RST 0x0 + +#define CHP_CFG_LDB_VAS_CRD_COUNT 0x00007FFF +#define CHP_CFG_LDB_VAS_CRD_RSVD0 0xFFFF8000 +#define CHP_CFG_LDB_VAS_CRD_COUNT_LOC 0 +#define CHP_CFG_LDB_VAS_CRD_RSVD0_LOC 15 + +#define CHP_ORD_QID_SN(x) \ + (0x40100000 + (x) * 0x1000) +#define CHP_ORD_QID_SN_RST 0x0 + +#define CHP_ORD_QID_SN_SN 0x000003FF +#define CHP_ORD_QID_SN_RSVD0 0xFFFFFC00 +#define CHP_ORD_QID_SN_SN_LOC 0 +#define CHP_ORD_QID_SN_RSVD0_LOC 10 + +#define CHP_ORD_QID_SN_MAP(x) \ + (0x40180000 + (x) * 0x1000) +#define CHP_ORD_QID_SN_MAP_RST 0x0 + +#define CHP_ORD_QID_SN_MAP_MODE 0x00000007 +#define CHP_ORD_QID_SN_MAP_SLOT 0x00000078 +#define CHP_ORD_QID_SN_MAP_RSVZ0 0x00000080 +#define CHP_ORD_QID_SN_MAP_GRP 0x00000100 +#define CHP_ORD_QID_SN_MAP_RSVZ1 0x00000200 +#define CHP_ORD_QID_SN_MAP_RSVD0 0xFFFFFC00 +#define CHP_ORD_QID_SN_MAP_MODE_LOC 0 +#define CHP_ORD_QID_SN_MAP_SLOT_LOC 3 +#define CHP_ORD_QID_SN_MAP_RSVZ0_LOC 7 +#define CHP_ORD_QID_SN_MAP_GRP_LOC 8 +#define CHP_ORD_QID_SN_MAP_RSVZ1_LOC 9 +#define CHP_ORD_QID_SN_MAP_RSVD0_LOC 10 + +#define CHP_SN_CHK_ENBL(x) \ + (0x40200000 + (x) * 0x1000) +#define CHP_SN_CHK_ENBL_RST 0x0 + +#define CHP_SN_CHK_ENBL_EN 0x00000001 +#define CHP_SN_CHK_ENBL_RSVD0 0xFFFFFFFE +#define CHP_SN_CHK_ENBL_EN_LOC 0 +#define CHP_SN_CHK_ENBL_RSVD0_LOC 1 + +#define CHP_DIR_CQ_DEPTH(x) \ + (0x40280000 + (x) * 0x1000) +#define CHP_DIR_CQ_DEPTH_RST 0x0 + +#define CHP_DIR_CQ_DEPTH_DEPTH 0x00001FFF +#define CHP_DIR_CQ_DEPTH_RSVD0 0xFFFFE000 +#define CHP_DIR_CQ_DEPTH_DEPTH_LOC 0 +#define CHP_DIR_CQ_DEPTH_RSVD0_LOC 13 + +#define CHP_DIR_CQ_INT_DEPTH_THRSH(x) \ + (0x40300000 + (x) * 0x1000) +#define CHP_DIR_CQ_INT_DEPTH_THRSH_RST 0x0 + +#define CHP_DIR_CQ_INT_DEPTH_THRSH_DEPTH_THRESHOLD 0x00001FFF +#define CHP_DIR_CQ_INT_DEPTH_THRSH_RSVD0 0xFFFFE000 +#define CHP_DIR_CQ_INT_DEPTH_THRSH_DEPTH_THRESHOLD_LOC 0 +#define CHP_DIR_CQ_INT_DEPTH_THRSH_RSVD0_LOC 13 + +#define CHP_DIR_CQ_INT_ENB(x) \ + (0x40380000 + (x) * 0x1000) +#define CHP_DIR_CQ_INT_ENB_RST 0x0 + +#define CHP_DIR_CQ_INT_ENB_EN_TIM 0x00000001 +#define CHP_DIR_CQ_INT_ENB_EN_DEPTH 0x00000002 +#define CHP_DIR_CQ_INT_ENB_RSVD0 0xFFFFFFFC +#define CHP_DIR_CQ_INT_ENB_EN_TIM_LOC 0 +#define CHP_DIR_CQ_INT_ENB_EN_DEPTH_LOC 1 +#define CHP_DIR_CQ_INT_ENB_RSVD0_LOC 2 + +#define CHP_DIR_CQ_TMR_THRSH(x) \ + (0x40480000 + (x) * 0x1000) +#define CHP_DIR_CQ_TMR_THRSH_RST 0x1 + +#define CHP_DIR_CQ_TMR_THRSH_THRSH_0 0x00000001 +#define CHP_DIR_CQ_TMR_THRSH_THRSH_13_1 0x00003FFE +#define CHP_DIR_CQ_TMR_THRSH_RSVD0 0xFFFFC000 +#define CHP_DIR_CQ_TMR_THRSH_THRSH_0_LOC 0 +#define CHP_DIR_CQ_TMR_THRSH_THRSH_13_1_LOC 1 +#define CHP_DIR_CQ_TMR_THRSH_RSVD0_LOC 14 + +#define CHP_DIR_CQ_TKN_DEPTH_SEL(x) \ + (0x40500000 + (x) * 0x1000) +#define CHP_DIR_CQ_TKN_DEPTH_SEL_RST 0x0 + +#define CHP_DIR_CQ_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT 0x0000000F +#define CHP_DIR_CQ_TKN_DEPTH_SEL_RSVD0 0xFFFFFFF0 +#define CHP_DIR_CQ_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_LOC 0 +#define CHP_DIR_CQ_TKN_DEPTH_SEL_RSVD0_LOC 4 + +#define CHP_DIR_CQ_WD_ENB(x) \ + (0x40580000 + (x) * 0x1000) +#define CHP_DIR_CQ_WD_ENB_RST 0x0 + +#define CHP_DIR_CQ_WD_ENB_WD_ENABLE 0x00000001 +#define CHP_DIR_CQ_WD_ENB_RSVD0 0xFFFFFFFE +#define CHP_DIR_CQ_WD_ENB_WD_ENABLE_LOC 0 +#define CHP_DIR_CQ_WD_ENB_RSVD0_LOC 1 + +#define CHP_DIR_CQ_WPTR(x) \ + (0x40600000 + (x) * 0x1000) +#define CHP_DIR_CQ_WPTR_RST 0x0 + +#define CHP_DIR_CQ_WPTR_WRITE_POINTER 0x00001FFF +#define CHP_DIR_CQ_WPTR_RSVD0 0xFFFFE000 +#define CHP_DIR_CQ_WPTR_WRITE_POINTER_LOC 0 +#define CHP_DIR_CQ_WPTR_RSVD0_LOC 13 + +#define CHP_DIR_CQ2VAS(x) \ + (0x40680000 + (x) * 0x1000) +#define CHP_DIR_CQ2VAS_RST 0x0 + +#define CHP_DIR_CQ2VAS_CQ2VAS 0x0000001F +#define CHP_DIR_CQ2VAS_RSVD0 0xFFFFFFE0 +#define CHP_DIR_CQ2VAS_CQ2VAS_LOC 0 +#define CHP_DIR_CQ2VAS_RSVD0_LOC 5 + +#define CHP_HIST_LIST_BASE(x) \ + (0x40700000 + (x) * 0x1000) +#define CHP_HIST_LIST_BASE_RST 0x0 + +#define CHP_HIST_LIST_BASE_BASE 0x00001FFF +#define CHP_HIST_LIST_BASE_RSVD0 0xFFFFE000 +#define CHP_HIST_LIST_BASE_BASE_LOC 0 +#define CHP_HIST_LIST_BASE_RSVD0_LOC 13 + +#define CHP_HIST_LIST_LIM(x) \ + (0x40780000 + (x) * 0x1000) +#define CHP_HIST_LIST_LIM_RST 0x0 + +#define CHP_HIST_LIST_LIM_LIMIT 0x00001FFF +#define CHP_HIST_LIST_LIM_RSVD0 0xFFFFE000 +#define CHP_HIST_LIST_LIM_LIMIT_LOC 0 +#define CHP_HIST_LIST_LIM_RSVD0_LOC 13 + +#define CHP_HIST_LIST_POP_PTR(x) \ + (0x40800000 + (x) * 0x1000) +#define CHP_HIST_LIST_POP_PTR_RST 0x0 + +#define CHP_HIST_LIST_POP_PTR_POP_PTR 0x00001FFF +#define CHP_HIST_LIST_POP_PTR_GENERATION 0x00002000 +#define CHP_HIST_LIST_POP_PTR_RSVD0 0xFFFFC000 +#define CHP_HIST_LIST_POP_PTR_POP_PTR_LOC 0 +#define CHP_HIST_LIST_POP_PTR_GENERATION_LOC 13 +#define CHP_HIST_LIST_POP_PTR_RSVD0_LOC 14 + +#define CHP_HIST_LIST_PUSH_PTR(x) \ + (0x40880000 + (x) * 0x1000) +#define CHP_HIST_LIST_PUSH_PTR_RST 0x0 + +#define CHP_HIST_LIST_PUSH_PTR_PUSH_PTR 0x00001FFF +#define CHP_HIST_LIST_PUSH_PTR_GENERATION 0x00002000 +#define CHP_HIST_LIST_PUSH_PTR_RSVD0 0xFFFFC000 +#define CHP_HIST_LIST_PUSH_PTR_PUSH_PTR_LOC 0 +#define CHP_HIST_LIST_PUSH_PTR_GENERATION_LOC 13 +#define CHP_HIST_LIST_PUSH_PTR_RSVD0_LOC 14 + +#define CHP_LDB_CQ_DEPTH(x) \ + (0x40900000 + (x) * 0x1000) +#define CHP_LDB_CQ_DEPTH_RST 0x0 + +#define CHP_LDB_CQ_DEPTH_DEPTH 0x000007FF +#define CHP_LDB_CQ_DEPTH_RSVD0 0xFFFFF800 +#define CHP_LDB_CQ_DEPTH_DEPTH_LOC 0 +#define CHP_LDB_CQ_DEPTH_RSVD0_LOC 11 + +#define CHP_LDB_CQ_INT_DEPTH_THRSH(x) \ + (0x40980000 + (x) * 0x1000) +#define CHP_LDB_CQ_INT_DEPTH_THRSH_RST 0x0 + +#define CHP_LDB_CQ_INT_DEPTH_THRSH_DEPTH_THRESHOLD 0x000007FF +#define CHP_LDB_CQ_INT_DEPTH_THRSH_RSVD0 0xFFFFF800 +#define CHP_LDB_CQ_INT_DEPTH_THRSH_DEPTH_THRESHOLD_LOC 0 +#define CHP_LDB_CQ_INT_DEPTH_THRSH_RSVD0_LOC 11 + +#define CHP_LDB_CQ_INT_ENB(x) \ + (0x40a00000 + (x) * 0x1000) +#define CHP_LDB_CQ_INT_ENB_RST 0x0 + +#define CHP_LDB_CQ_INT_ENB_EN_TIM 0x00000001 +#define CHP_LDB_CQ_INT_ENB_EN_DEPTH 0x00000002 +#define CHP_LDB_CQ_INT_ENB_RSVD0 0xFFFFFFFC +#define CHP_LDB_CQ_INT_ENB_EN_TIM_LOC 0 +#define CHP_LDB_CQ_INT_ENB_EN_DEPTH_LOC 1 +#define CHP_LDB_CQ_INT_ENB_RSVD0_LOC 2 + +#define CHP_LDB_CQ_TMR_THRSH(x) \ + (0x40b00000 + (x) * 0x1000) +#define CHP_LDB_CQ_TMR_THRSH_RST 0x1 + +#define CHP_LDB_CQ_TMR_THRSH_THRSH_0 0x00000001 +#define CHP_LDB_CQ_TMR_THRSH_THRSH_13_1 0x00003FFE +#define CHP_LDB_CQ_TMR_THRSH_RSVD0 0xFFFFC000 +#define CHP_LDB_CQ_TMR_THRSH_THRSH_0_LOC 0 +#define CHP_LDB_CQ_TMR_THRSH_THRSH_13_1_LOC 1 +#define CHP_LDB_CQ_TMR_THRSH_RSVD0_LOC 14 + +#define CHP_LDB_CQ_TKN_DEPTH_SEL(x) \ + (0x40b80000 + (x) * 0x1000) +#define CHP_LDB_CQ_TKN_DEPTH_SEL_RST 0x0 + +#define CHP_LDB_CQ_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT 0x0000000F +#define CHP_LDB_CQ_TKN_DEPTH_SEL_RSVD0 0xFFFFFFF0 +#define CHP_LDB_CQ_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_LOC 0 +#define CHP_LDB_CQ_TKN_DEPTH_SEL_RSVD0_LOC 4 + +#define CHP_LDB_CQ_WD_ENB(x) \ + (0x40c00000 + (x) * 0x1000) +#define CHP_LDB_CQ_WD_ENB_RST 0x0 + +#define CHP_LDB_CQ_WD_ENB_WD_ENABLE 0x00000001 +#define CHP_LDB_CQ_WD_ENB_RSVD0 0xFFFFFFFE +#define CHP_LDB_CQ_WD_ENB_WD_ENABLE_LOC 0 +#define CHP_LDB_CQ_WD_ENB_RSVD0_LOC 1 + +#define CHP_LDB_CQ_WPTR(x) \ + (0x40c80000 + (x) * 0x1000) +#define CHP_LDB_CQ_WPTR_RST 0x0 + +#define CHP_LDB_CQ_WPTR_WRITE_POINTER 0x000007FF +#define CHP_LDB_CQ_WPTR_RSVD0 0xFFFFF800 +#define CHP_LDB_CQ_WPTR_WRITE_POINTER_LOC 0 +#define CHP_LDB_CQ_WPTR_RSVD0_LOC 11 + +#define CHP_LDB_CQ2VAS(x) \ + (0x40d00000 + (x) * 0x1000) +#define CHP_LDB_CQ2VAS_RST 0x0 + +#define CHP_LDB_CQ2VAS_CQ2VAS 0x0000001F +#define CHP_LDB_CQ2VAS_RSVD0 0xFFFFFFE0 +#define CHP_LDB_CQ2VAS_CQ2VAS_LOC 0 +#define CHP_LDB_CQ2VAS_RSVD0_LOC 5 + +#define CHP_CFG_CHP_CSR_CTRL 0x44000008 +#define CHP_CFG_CHP_CSR_CTRL_RST 0x180002 + +#define CHP_CFG_CHP_CSR_CTRL_INT_COR_ALARM_DIS 0x00000001 +#define CHP_CFG_CHP_CSR_CTRL_INT_COR_SYND_DIS 0x00000002 +#define CHP_CFG_CHP_CSR_CTRL_INT_UNCR_ALARM_DIS 0x00000004 +#define CHP_CFG_CHP_CSR_CTRL_INT_UNC_SYND_DIS 0x00000008 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF0_ALARM_DIS 0x00000010 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF0_SYND_DIS 0x00000020 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF1_ALARM_DIS 0x00000040 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF1_SYND_DIS 0x00000080 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF2_ALARM_DIS 0x00000100 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF2_SYND_DIS 0x00000200 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF3_ALARM_DIS 0x00000400 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF3_SYND_DIS 0x00000800 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF4_ALARM_DIS 0x00001000 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF4_SYND_DIS 0x00002000 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF5_ALARM_DIS 0x00004000 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF5_SYND_DIS 0x00008000 +#define CHP_CFG_CHP_CSR_CTRL_DLB_COR_ALARM_ENABLE 0x00010000 +#define CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_LDB_CQ_MODE 0x00020000 +#define CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_DIR_CQ_MODE 0x00040000 +#define CHP_CFG_CHP_CSR_CTRL_PAD_WRITE_LDB 0x00080000 +#define CHP_CFG_CHP_CSR_CTRL_PAD_WRITE_DIR 0x00100000 +#define CHP_CFG_CHP_CSR_CTRL_PAD_FIRST_WRITE_LDB 0x00200000 +#define CHP_CFG_CHP_CSR_CTRL_PAD_FIRST_WRITE_DIR 0x00400000 +#define CHP_CFG_CHP_CSR_CTRL_RSVZ0 0xFF800000 +#define CHP_CFG_CHP_CSR_CTRL_INT_COR_ALARM_DIS_LOC 0 +#define CHP_CFG_CHP_CSR_CTRL_INT_COR_SYND_DIS_LOC 1 +#define CHP_CFG_CHP_CSR_CTRL_INT_UNCR_ALARM_DIS_LOC 2 +#define CHP_CFG_CHP_CSR_CTRL_INT_UNC_SYND_DIS_LOC 3 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF0_ALARM_DIS_LOC 4 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF0_SYND_DIS_LOC 5 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF1_ALARM_DIS_LOC 6 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF1_SYND_DIS_LOC 7 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF2_ALARM_DIS_LOC 8 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF2_SYND_DIS_LOC 9 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF3_ALARM_DIS_LOC 10 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF3_SYND_DIS_LOC 11 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF4_ALARM_DIS_LOC 12 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF4_SYND_DIS_LOC 13 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF5_ALARM_DIS_LOC 14 +#define CHP_CFG_CHP_CSR_CTRL_INT_INF5_SYND_DIS_LOC 15 +#define CHP_CFG_CHP_CSR_CTRL_DLB_COR_ALARM_ENABLE_LOC 16 +#define CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_LDB_CQ_MODE_LOC 17 +#define CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_DIR_CQ_MODE_LOC 18 +#define CHP_CFG_CHP_CSR_CTRL_PAD_WRITE_LDB_LOC 19 +#define CHP_CFG_CHP_CSR_CTRL_PAD_WRITE_DIR_LOC 20 +#define CHP_CFG_CHP_CSR_CTRL_PAD_FIRST_WRITE_LDB_LOC 21 +#define CHP_CFG_CHP_CSR_CTRL_PAD_FIRST_WRITE_DIR_LOC 22 +#define CHP_CFG_CHP_CSR_CTRL_RSVZ0_LOC 23 + +#define CHP_DIR_CQ_INTR_ARMED0 0x4400005c +#define CHP_DIR_CQ_INTR_ARMED0_RST 0x0 + +#define CHP_DIR_CQ_INTR_ARMED0_ARMED 0xFFFFFFFF +#define CHP_DIR_CQ_INTR_ARMED0_ARMED_LOC 0 + +#define CHP_DIR_CQ_INTR_ARMED1 0x44000060 +#define CHP_DIR_CQ_INTR_ARMED1_RST 0x0 + +#define CHP_DIR_CQ_INTR_ARMED1_ARMED 0xFFFFFFFF +#define CHP_DIR_CQ_INTR_ARMED1_ARMED_LOC 0 + +#define CHP_CFG_DIR_CQ_TIMER_CTL 0x44000084 +#define CHP_CFG_DIR_CQ_TIMER_CTL_RST 0x0 + +#define CHP_CFG_DIR_CQ_TIMER_CTL_SAMPLE_INTERVAL 0x000000FF +#define CHP_CFG_DIR_CQ_TIMER_CTL_ENB 0x00000100 +#define CHP_CFG_DIR_CQ_TIMER_CTL_RSVZ0 0xFFFFFE00 +#define CHP_CFG_DIR_CQ_TIMER_CTL_SAMPLE_INTERVAL_LOC 0 +#define CHP_CFG_DIR_CQ_TIMER_CTL_ENB_LOC 8 +#define CHP_CFG_DIR_CQ_TIMER_CTL_RSVZ0_LOC 9 + +#define CHP_CFG_DIR_WDTO_0 0x44000088 +#define CHP_CFG_DIR_WDTO_0_RST 0x0 + +#define CHP_CFG_DIR_WDTO_0_WDTO 0xFFFFFFFF +#define CHP_CFG_DIR_WDTO_0_WDTO_LOC 0 + +#define CHP_CFG_DIR_WDTO_1 0x4400008c +#define CHP_CFG_DIR_WDTO_1_RST 0x0 + +#define CHP_CFG_DIR_WDTO_1_WDTO 0xFFFFFFFF +#define CHP_CFG_DIR_WDTO_1_WDTO_LOC 0 + +#define CHP_CFG_DIR_WD_DISABLE0 0x44000098 +#define CHP_CFG_DIR_WD_DISABLE0_RST 0xffffffff + +#define CHP_CFG_DIR_WD_DISABLE0_WD_DISABLE 0xFFFFFFFF +#define CHP_CFG_DIR_WD_DISABLE0_WD_DISABLE_LOC 0 + +#define CHP_CFG_DIR_WD_DISABLE1 0x4400009c +#define CHP_CFG_DIR_WD_DISABLE1_RST 0xffffffff + +#define CHP_CFG_DIR_WD_DISABLE1_WD_DISABLE 0xFFFFFFFF +#define CHP_CFG_DIR_WD_DISABLE1_WD_DISABLE_LOC 0 + +#define CHP_CFG_DIR_WD_ENB_INTERVAL 0x440000a0 +#define CHP_CFG_DIR_WD_ENB_INTERVAL_RST 0x0 + +#define CHP_CFG_DIR_WD_ENB_INTERVAL_SAMPLE_INTERVAL 0x0FFFFFFF +#define CHP_CFG_DIR_WD_ENB_INTERVAL_ENB 0x10000000 +#define CHP_CFG_DIR_WD_ENB_INTERVAL_RSVZ0 0xE0000000 +#define CHP_CFG_DIR_WD_ENB_INTERVAL_SAMPLE_INTERVAL_LOC 0 +#define CHP_CFG_DIR_WD_ENB_INTERVAL_ENB_LOC 28 +#define CHP_CFG_DIR_WD_ENB_INTERVAL_RSVZ0_LOC 29 + +#define CHP_CFG_DIR_WD_THRESHOLD 0x440000ac +#define CHP_CFG_DIR_WD_THRESHOLD_RST 0x0 + +#define CHP_CFG_DIR_WD_THRESHOLD_WD_THRESHOLD 0x000000FF +#define CHP_CFG_DIR_WD_THRESHOLD_RSVZ0 0xFFFFFF00 +#define CHP_CFG_DIR_WD_THRESHOLD_WD_THRESHOLD_LOC 0 +#define CHP_CFG_DIR_WD_THRESHOLD_RSVZ0_LOC 8 + +#define CHP_LDB_CQ_INTR_ARMED0 0x440000b0 +#define CHP_LDB_CQ_INTR_ARMED0_RST 0x0 + +#define CHP_LDB_CQ_INTR_ARMED0_ARMED 0xFFFFFFFF +#define CHP_LDB_CQ_INTR_ARMED0_ARMED_LOC 0 + +#define CHP_LDB_CQ_INTR_ARMED1 0x440000b4 +#define CHP_LDB_CQ_INTR_ARMED1_RST 0x0 + +#define CHP_LDB_CQ_INTR_ARMED1_ARMED 0xFFFFFFFF +#define CHP_LDB_CQ_INTR_ARMED1_ARMED_LOC 0 + +#define CHP_CFG_LDB_CQ_TIMER_CTL 0x440000d8 +#define CHP_CFG_LDB_CQ_TIMER_CTL_RST 0x0 + +#define CHP_CFG_LDB_CQ_TIMER_CTL_SAMPLE_INTERVAL 0x000000FF +#define CHP_CFG_LDB_CQ_TIMER_CTL_ENB 0x00000100 +#define CHP_CFG_LDB_CQ_TIMER_CTL_RSVZ0 0xFFFFFE00 +#define CHP_CFG_LDB_CQ_TIMER_CTL_SAMPLE_INTERVAL_LOC 0 +#define CHP_CFG_LDB_CQ_TIMER_CTL_ENB_LOC 8 +#define CHP_CFG_LDB_CQ_TIMER_CTL_RSVZ0_LOC 9 + +#define CHP_CFG_LDB_WDTO_0 0x440000dc +#define CHP_CFG_LDB_WDTO_0_RST 0x0 + +#define CHP_CFG_LDB_WDTO_0_WDTO 0xFFFFFFFF +#define CHP_CFG_LDB_WDTO_0_WDTO_LOC 0 + +#define CHP_CFG_LDB_WDTO_1 0x440000e0 +#define CHP_CFG_LDB_WDTO_1_RST 0x0 + +#define CHP_CFG_LDB_WDTO_1_WDTO 0xFFFFFFFF +#define CHP_CFG_LDB_WDTO_1_WDTO_LOC 0 + +#define CHP_CFG_LDB_WD_DISABLE0 0x440000ec +#define CHP_CFG_LDB_WD_DISABLE0_RST 0xffffffff + +#define CHP_CFG_LDB_WD_DISABLE0_WD_DISABLE 0xFFFFFFFF +#define CHP_CFG_LDB_WD_DISABLE0_WD_DISABLE_LOC 0 + +#define CHP_CFG_LDB_WD_DISABLE1 0x440000f0 +#define CHP_CFG_LDB_WD_DISABLE1_RST 0xffffffff + +#define CHP_CFG_LDB_WD_DISABLE1_WD_DISABLE 0xFFFFFFFF +#define CHP_CFG_LDB_WD_DISABLE1_WD_DISABLE_LOC 0 + +#define CHP_CFG_LDB_WD_ENB_INTERVAL 0x440000f4 +#define CHP_CFG_LDB_WD_ENB_INTERVAL_RST 0x0 + +#define CHP_CFG_LDB_WD_ENB_INTERVAL_SAMPLE_INTERVAL 0x0FFFFFFF +#define CHP_CFG_LDB_WD_ENB_INTERVAL_ENB 0x10000000 +#define CHP_CFG_LDB_WD_ENB_INTERVAL_RSVZ0 0xE0000000 +#define CHP_CFG_LDB_WD_ENB_INTERVAL_SAMPLE_INTERVAL_LOC 0 +#define CHP_CFG_LDB_WD_ENB_INTERVAL_ENB_LOC 28 +#define CHP_CFG_LDB_WD_ENB_INTERVAL_RSVZ0_LOC 29 + +#define CHP_CFG_LDB_WD_THRESHOLD 0x44000100 +#define CHP_CFG_LDB_WD_THRESHOLD_RST 0x0 + +#define CHP_CFG_LDB_WD_THRESHOLD_WD_THRESHOLD 0x000000FF +#define CHP_CFG_LDB_WD_THRESHOLD_RSVZ0 0xFFFFFF00 +#define CHP_CFG_LDB_WD_THRESHOLD_WD_THRESHOLD_LOC 0 +#define CHP_CFG_LDB_WD_THRESHOLD_RSVZ0_LOC 8 + +#define CHP_SMON_COMPARE0 0x4c000000 +#define CHP_SMON_COMPARE0_RST 0x0 + +#define CHP_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define CHP_SMON_COMPARE0_COMPARE0_LOC 0 + +#define CHP_SMON_COMPARE1 0x4c000004 +#define CHP_SMON_COMPARE1_RST 0x0 + +#define CHP_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define CHP_SMON_COMPARE1_COMPARE1_LOC 0 + +#define CHP_SMON_CFG0 0x4c000008 +#define CHP_SMON_CFG0_RST 0x40000000 + +#define CHP_SMON_CFG0_SMON_ENABLE 0x00000001 +#define CHP_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define CHP_SMON_CFG0_RSVZ0 0x0000000C +#define CHP_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define CHP_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define CHP_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define CHP_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define CHP_SMON_CFG0_SMON_MODE 0x0000F000 +#define CHP_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define CHP_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define CHP_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define CHP_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define CHP_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define CHP_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define CHP_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define CHP_SMON_CFG0_RSVZ1 0x00800000 +#define CHP_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define CHP_SMON_CFG0_RSVZ2 0x20000000 +#define CHP_SMON_CFG0_VERSION 0xC0000000 +#define CHP_SMON_CFG0_SMON_ENABLE_LOC 0 +#define CHP_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define CHP_SMON_CFG0_RSVZ0_LOC 2 +#define CHP_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define CHP_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define CHP_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define CHP_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define CHP_SMON_CFG0_SMON_MODE_LOC 12 +#define CHP_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define CHP_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define CHP_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define CHP_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define CHP_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define CHP_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define CHP_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define CHP_SMON_CFG0_RSVZ1_LOC 23 +#define CHP_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define CHP_SMON_CFG0_RSVZ2_LOC 29 +#define CHP_SMON_CFG0_VERSION_LOC 30 + +#define CHP_SMON_CFG1 0x4c00000c +#define CHP_SMON_CFG1_RST 0x0 + +#define CHP_SMON_CFG1_MODE0 0x000000FF +#define CHP_SMON_CFG1_MODE1 0x0000FF00 +#define CHP_SMON_CFG1_RSVZ0 0xFFFF0000 +#define CHP_SMON_CFG1_MODE0_LOC 0 +#define CHP_SMON_CFG1_MODE1_LOC 8 +#define CHP_SMON_CFG1_RSVZ0_LOC 16 + +#define CHP_SMON_ACTIVITYCNTR0 0x4c000010 +#define CHP_SMON_ACTIVITYCNTR0_RST 0x0 + +#define CHP_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define CHP_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define CHP_SMON_ACTIVITYCNTR1 0x4c000014 +#define CHP_SMON_ACTIVITYCNTR1_RST 0x0 -#define CHP_CFG_LDB_VAS_CRD(x) \ - (0x40080000 + (x) * 0x1000) -#define CHP_CFG_LDB_VAS_CRD_RST 0x0 +#define CHP_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define CHP_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 -#define CHP_CFG_LDB_VAS_CRD_COUNT 0x00007FFF -#define CHP_CFG_LDB_VAS_CRD_RSVD0 0xFFFF8000 -#define CHP_CFG_LDB_VAS_CRD_COUNT_LOC 0 -#define CHP_CFG_LDB_VAS_CRD_RSVD0_LOC 15 +#define CHP_SMON_MAX_TMR 0x4c000018 +#define CHP_SMON_MAX_TMR_RST 0x0 + +#define CHP_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define CHP_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define CHP_SMON_TMR 0x4c00001c +#define CHP_SMON_TMR_RST 0x0 + +#define CHP_SMON_TMR_TIMER 0xFFFFFFFF +#define CHP_SMON_TMR_TIMER_LOC 0 + +#define CHP_CTRL_DIAG_02 0x4c000028 +#define CHP_CTRL_DIAG_02_RST 0x1555 + +#define CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_EMPTY 0x00000001 +#define CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_AFULL 0x00000002 +#define CHP_CTRL_DIAG_02_CHP_OUTBOUND_HCW_PIPE_CREDIT_STATUS_EMPTY 0x00000004 +#define CHP_CTRL_DIAG_02_CHP_OUTBOUND_HCW_PIPE_CREDIT_STATUS_AFULL 0x00000008 +#define CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_EMPTY 0x00000010 +#define CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_AFULL 0x00000020 +#define CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_EMPTY 0x00000040 +#define CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_AFULL 0x00000080 +#define CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_EMPTY 0x00000100 +#define CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_AFULL 0x00000200 +#define CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_EMPTY 0x00000400 +#define CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_AFULL 0x00000800 +#define CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_EMPTY 0x00001000 +#define CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_AFULL 0x00002000 +#define CHP_CTRL_DIAG_02_RSVD0 0xFFFFC000 +#define CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_EMPTY_LOC 0 +#define CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_AFULL_LOC 1 +#define CHP_CTRL_DIAG_02_CHP_OUTBOUND_HCW_PIPE_CREDIT_STATUS_EMPTY_LOC 2 +#define CHP_CTRL_DIAG_02_CHP_OUTBOUND_HCW_PIPE_CREDIT_STATUS_AFULL_LOC 3 +#define CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_EMPTY_LOC 4 +#define CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_AFULL_LOC 5 +#define CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_EMPTY_LOC 6 +#define CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_AFULL_LOC 7 +#define CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_EMPTY_LOC 8 +#define CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_AFULL_LOC 9 +#define CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_EMPTY_LOC 10 +#define CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_AFULL_LOC 11 +#define CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_EMPTY_LOC 12 +#define CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_AFULL_LOC 13 +#define CHP_CTRL_DIAG_02_RSVD0_LOC 14 + +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0 0x54000000 +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_RST 0xfefcfaf8 + +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI0 0x000000FF +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI1 0x0000FF00 +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI2 0x00FF0000 +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI3 0xFF000000 +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI0_LOC 0 +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI1_LOC 8 +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI2_LOC 16 +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI3_LOC 24 + +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_1 0x54000004 +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_1_RST 0x0 + +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_1_RSVZ0 0xFFFFFFFF +#define DP_CFG_ARB_WEIGHTS_TQPRI_DIR_1_RSVZ0_LOC 0 + +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0 0x54000008 +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_RST 0xfefcfaf8 + +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI0 0x000000FF +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI1 0x0000FF00 +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI2 0x00FF0000 +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI3 0xFF000000 +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI0_LOC 0 +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI1_LOC 8 +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI2_LOC 16 +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI3_LOC 24 + +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1 0x5400000c +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RST 0x0 + +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RSVZ0 0xFFFFFFFF +#define DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RSVZ0_LOC 0 + +#define DP_DIR_CSR_CTRL 0x54000010 +#define DP_DIR_CSR_CTRL_RST 0x0 + +#define DP_DIR_CSR_CTRL_INT_COR_ALARM_DIS 0x00000001 +#define DP_DIR_CSR_CTRL_INT_COR_SYND_DIS 0x00000002 +#define DP_DIR_CSR_CTRL_INT_UNCR_ALARM_DIS 0x00000004 +#define DP_DIR_CSR_CTRL_INT_UNC_SYND_DIS 0x00000008 +#define DP_DIR_CSR_CTRL_INT_INF0_ALARM_DIS 0x00000010 +#define DP_DIR_CSR_CTRL_INT_INF0_SYND_DIS 0x00000020 +#define DP_DIR_CSR_CTRL_INT_INF1_ALARM_DIS 0x00000040 +#define DP_DIR_CSR_CTRL_INT_INF1_SYND_DIS 0x00000080 +#define DP_DIR_CSR_CTRL_INT_INF2_ALARM_DIS 0x00000100 +#define DP_DIR_CSR_CTRL_INT_INF2_SYND_DIS 0x00000200 +#define DP_DIR_CSR_CTRL_INT_INF3_ALARM_DIS 0x00000400 +#define DP_DIR_CSR_CTRL_INT_INF3_SYND_DIS 0x00000800 +#define DP_DIR_CSR_CTRL_INT_INF4_ALARM_DIS 0x00001000 +#define DP_DIR_CSR_CTRL_INT_INF4_SYND_DIS 0x00002000 +#define DP_DIR_CSR_CTRL_INT_INF5_ALARM_DIS 0x00004000 +#define DP_DIR_CSR_CTRL_INT_INF5_SYND_DIS 0x00008000 +#define DP_DIR_CSR_CTRL_RSVZ0 0xFFFF0000 +#define DP_DIR_CSR_CTRL_INT_COR_ALARM_DIS_LOC 0 +#define DP_DIR_CSR_CTRL_INT_COR_SYND_DIS_LOC 1 +#define DP_DIR_CSR_CTRL_INT_UNCR_ALARM_DIS_LOC 2 +#define DP_DIR_CSR_CTRL_INT_UNC_SYND_DIS_LOC 3 +#define DP_DIR_CSR_CTRL_INT_INF0_ALARM_DIS_LOC 4 +#define DP_DIR_CSR_CTRL_INT_INF0_SYND_DIS_LOC 5 +#define DP_DIR_CSR_CTRL_INT_INF1_ALARM_DIS_LOC 6 +#define DP_DIR_CSR_CTRL_INT_INF1_SYND_DIS_LOC 7 +#define DP_DIR_CSR_CTRL_INT_INF2_ALARM_DIS_LOC 8 +#define DP_DIR_CSR_CTRL_INT_INF2_SYND_DIS_LOC 9 +#define DP_DIR_CSR_CTRL_INT_INF3_ALARM_DIS_LOC 10 +#define DP_DIR_CSR_CTRL_INT_INF3_SYND_DIS_LOC 11 +#define DP_DIR_CSR_CTRL_INT_INF4_ALARM_DIS_LOC 12 +#define DP_DIR_CSR_CTRL_INT_INF4_SYND_DIS_LOC 13 +#define DP_DIR_CSR_CTRL_INT_INF5_ALARM_DIS_LOC 14 +#define DP_DIR_CSR_CTRL_INT_INF5_SYND_DIS_LOC 15 +#define DP_DIR_CSR_CTRL_RSVZ0_LOC 16 + +#define DP_SMON_ACTIVITYCNTR0 0x5c000058 +#define DP_SMON_ACTIVITYCNTR0_RST 0x0 + +#define DP_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define DP_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define DP_SMON_ACTIVITYCNTR1 0x5c00005c +#define DP_SMON_ACTIVITYCNTR1_RST 0x0 + +#define DP_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define DP_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define DP_SMON_COMPARE0 0x5c000060 +#define DP_SMON_COMPARE0_RST 0x0 + +#define DP_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define DP_SMON_COMPARE0_COMPARE0_LOC 0 + +#define DP_SMON_COMPARE1 0x5c000064 +#define DP_SMON_COMPARE1_RST 0x0 + +#define DP_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define DP_SMON_COMPARE1_COMPARE1_LOC 0 + +#define DP_SMON_CFG0 0x5c000068 +#define DP_SMON_CFG0_RST 0x40000000 + +#define DP_SMON_CFG0_SMON_ENABLE 0x00000001 +#define DP_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define DP_SMON_CFG0_RSVZ0 0x0000000C +#define DP_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define DP_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define DP_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define DP_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define DP_SMON_CFG0_SMON_MODE 0x0000F000 +#define DP_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define DP_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define DP_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define DP_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define DP_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define DP_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define DP_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define DP_SMON_CFG0_RSVZ1 0x00800000 +#define DP_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define DP_SMON_CFG0_RSVZ2 0x20000000 +#define DP_SMON_CFG0_VERSION 0xC0000000 +#define DP_SMON_CFG0_SMON_ENABLE_LOC 0 +#define DP_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define DP_SMON_CFG0_RSVZ0_LOC 2 +#define DP_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define DP_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define DP_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define DP_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define DP_SMON_CFG0_SMON_MODE_LOC 12 +#define DP_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define DP_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define DP_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define DP_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define DP_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define DP_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define DP_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define DP_SMON_CFG0_RSVZ1_LOC 23 +#define DP_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define DP_SMON_CFG0_RSVZ2_LOC 29 +#define DP_SMON_CFG0_VERSION_LOC 30 + +#define DP_SMON_CFG1 0x5c00006c +#define DP_SMON_CFG1_RST 0x0 + +#define DP_SMON_CFG1_MODE0 0x000000FF +#define DP_SMON_CFG1_MODE1 0x0000FF00 +#define DP_SMON_CFG1_RSVZ0 0xFFFF0000 +#define DP_SMON_CFG1_MODE0_LOC 0 +#define DP_SMON_CFG1_MODE1_LOC 8 +#define DP_SMON_CFG1_RSVZ0_LOC 16 + +#define DP_SMON_MAX_TMR 0x5c000070 +#define DP_SMON_MAX_TMR_RST 0x0 + +#define DP_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define DP_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define DP_SMON_TMR 0x5c000074 +#define DP_SMON_TMR_RST 0x0 + +#define DP_SMON_TMR_TIMER 0xFFFFFFFF +#define DP_SMON_TMR_TIMER_LOC 0 + +#define DQED_SMON_ACTIVITYCNTR0 0x6c000024 +#define DQED_SMON_ACTIVITYCNTR0_RST 0x0 + +#define DQED_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define DQED_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define DQED_SMON_ACTIVITYCNTR1 0x6c000028 +#define DQED_SMON_ACTIVITYCNTR1_RST 0x0 + +#define DQED_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define DQED_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define DQED_SMON_COMPARE0 0x6c00002c +#define DQED_SMON_COMPARE0_RST 0x0 + +#define DQED_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define DQED_SMON_COMPARE0_COMPARE0_LOC 0 + +#define DQED_SMON_COMPARE1 0x6c000030 +#define DQED_SMON_COMPARE1_RST 0x0 + +#define DQED_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define DQED_SMON_COMPARE1_COMPARE1_LOC 0 + +#define DQED_SMON_CFG0 0x6c000034 +#define DQED_SMON_CFG0_RST 0x40000000 + +#define DQED_SMON_CFG0_SMON_ENABLE 0x00000001 +#define DQED_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define DQED_SMON_CFG0_RSVZ0 0x0000000C +#define DQED_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define DQED_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define DQED_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define DQED_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define DQED_SMON_CFG0_SMON_MODE 0x0000F000 +#define DQED_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define DQED_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define DQED_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define DQED_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define DQED_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define DQED_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define DQED_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define DQED_SMON_CFG0_RSVZ1 0x00800000 +#define DQED_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define DQED_SMON_CFG0_RSVZ2 0x20000000 +#define DQED_SMON_CFG0_VERSION 0xC0000000 +#define DQED_SMON_CFG0_SMON_ENABLE_LOC 0 +#define DQED_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define DQED_SMON_CFG0_RSVZ0_LOC 2 +#define DQED_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define DQED_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define DQED_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define DQED_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define DQED_SMON_CFG0_SMON_MODE_LOC 12 +#define DQED_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define DQED_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define DQED_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define DQED_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define DQED_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define DQED_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define DQED_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define DQED_SMON_CFG0_RSVZ1_LOC 23 +#define DQED_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define DQED_SMON_CFG0_RSVZ2_LOC 29 +#define DQED_SMON_CFG0_VERSION_LOC 30 + +#define DQED_SMON_CFG1 0x6c000038 +#define DQED_SMON_CFG1_RST 0x0 + +#define DQED_SMON_CFG1_MODE0 0x000000FF +#define DQED_SMON_CFG1_MODE1 0x0000FF00 +#define DQED_SMON_CFG1_RSVZ0 0xFFFF0000 +#define DQED_SMON_CFG1_MODE0_LOC 0 +#define DQED_SMON_CFG1_MODE1_LOC 8 +#define DQED_SMON_CFG1_RSVZ0_LOC 16 + +#define DQED_SMON_MAX_TMR 0x6c00003c +#define DQED_SMON_MAX_TMR_RST 0x0 + +#define DQED_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define DQED_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define DQED_SMON_TMR 0x6c000040 +#define DQED_SMON_TMR_RST 0x0 + +#define DQED_SMON_TMR_TIMER 0xFFFFFFFF +#define DQED_SMON_TMR_TIMER_LOC 0 + +#define QED_SMON_ACTIVITYCNTR0 0x7c000024 +#define QED_SMON_ACTIVITYCNTR0_RST 0x0 + +#define QED_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define QED_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define QED_SMON_ACTIVITYCNTR1 0x7c000028 +#define QED_SMON_ACTIVITYCNTR1_RST 0x0 + +#define QED_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define QED_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define QED_SMON_COMPARE0 0x7c00002c +#define QED_SMON_COMPARE0_RST 0x0 + +#define QED_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define QED_SMON_COMPARE0_COMPARE0_LOC 0 + +#define QED_SMON_COMPARE1 0x7c000030 +#define QED_SMON_COMPARE1_RST 0x0 + +#define QED_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define QED_SMON_COMPARE1_COMPARE1_LOC 0 + +#define QED_SMON_CFG0 0x7c000034 +#define QED_SMON_CFG0_RST 0x40000000 + +#define QED_SMON_CFG0_SMON_ENABLE 0x00000001 +#define QED_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define QED_SMON_CFG0_RSVZ0 0x0000000C +#define QED_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define QED_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define QED_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define QED_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define QED_SMON_CFG0_SMON_MODE 0x0000F000 +#define QED_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define QED_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define QED_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define QED_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define QED_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define QED_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define QED_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define QED_SMON_CFG0_RSVZ1 0x00800000 +#define QED_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define QED_SMON_CFG0_RSVZ2 0x20000000 +#define QED_SMON_CFG0_VERSION 0xC0000000 +#define QED_SMON_CFG0_SMON_ENABLE_LOC 0 +#define QED_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define QED_SMON_CFG0_RSVZ0_LOC 2 +#define QED_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define QED_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define QED_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define QED_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define QED_SMON_CFG0_SMON_MODE_LOC 12 +#define QED_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define QED_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define QED_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define QED_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define QED_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define QED_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define QED_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define QED_SMON_CFG0_RSVZ1_LOC 23 +#define QED_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define QED_SMON_CFG0_RSVZ2_LOC 29 +#define QED_SMON_CFG0_VERSION_LOC 30 + +#define QED_SMON_CFG1 0x7c000038 +#define QED_SMON_CFG1_RST 0x0 + +#define QED_SMON_CFG1_MODE0 0x000000FF +#define QED_SMON_CFG1_MODE1 0x0000FF00 +#define QED_SMON_CFG1_RSVZ0 0xFFFF0000 +#define QED_SMON_CFG1_MODE0_LOC 0 +#define QED_SMON_CFG1_MODE1_LOC 8 +#define QED_SMON_CFG1_RSVZ0_LOC 16 + +#define QED_SMON_MAX_TMR 0x7c00003c +#define QED_SMON_MAX_TMR_RST 0x0 + +#define QED_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define QED_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define QED_SMON_TMR 0x7c000040 +#define QED_SMON_TMR_RST 0x0 + +#define QED_SMON_TMR_TIMER 0xFFFFFFFF +#define QED_SMON_TMR_TIMER_LOC 0 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0 0x84000000 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_RST 0xfefcfaf8 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI0 0x000000FF +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI1 0x0000FF00 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI2 0x00FF0000 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI3 0xFF000000 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI0_LOC 0 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI1_LOC 8 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI2_LOC 16 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI3_LOC 24 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1 0x84000004 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1_RST 0x0 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1_RSVZ0 0xFFFFFFFF +#define NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1_RSVZ0_LOC 0 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0 0x84000008 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_RST 0xfefcfaf8 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI0 0x000000FF +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI1 0x0000FF00 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI2 0x00FF0000 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI3 0xFF000000 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI0_LOC 0 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI1_LOC 8 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI2_LOC 16 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI3_LOC 24 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1 0x8400000c +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1_RST 0x0 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1_RSVZ0 0xFFFFFFFF +#define NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1_RSVZ0_LOC 0 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0 0x84000010 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_RST 0xfefcfaf8 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI0 0x000000FF +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI1 0x0000FF00 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI2 0x00FF0000 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI3 0xFF000000 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI0_LOC 0 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI1_LOC 8 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI2_LOC 16 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI3_LOC 24 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1 0x84000014 +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RST 0x0 + +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RSVZ0 0xFFFFFFFF +#define NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RSVZ0_LOC 0 + +#define NALB_SMON_ACTIVITYCNTR0 0x8c000064 +#define NALB_SMON_ACTIVITYCNTR0_RST 0x0 + +#define NALB_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define NALB_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define NALB_SMON_ACTIVITYCNTR1 0x8c000068 +#define NALB_SMON_ACTIVITYCNTR1_RST 0x0 + +#define NALB_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define NALB_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define NALB_SMON_COMPARE0 0x8c00006c +#define NALB_SMON_COMPARE0_RST 0x0 + +#define NALB_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define NALB_SMON_COMPARE0_COMPARE0_LOC 0 + +#define NALB_SMON_COMPARE1 0x8c000070 +#define NALB_SMON_COMPARE1_RST 0x0 + +#define NALB_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define NALB_SMON_COMPARE1_COMPARE1_LOC 0 + +#define NALB_SMON_CFG0 0x8c000074 +#define NALB_SMON_CFG0_RST 0x40000000 + +#define NALB_SMON_CFG0_SMON_ENABLE 0x00000001 +#define NALB_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define NALB_SMON_CFG0_RSVZ0 0x0000000C +#define NALB_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define NALB_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define NALB_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define NALB_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define NALB_SMON_CFG0_SMON_MODE 0x0000F000 +#define NALB_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define NALB_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define NALB_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define NALB_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define NALB_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define NALB_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define NALB_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define NALB_SMON_CFG0_RSVZ1 0x00800000 +#define NALB_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define NALB_SMON_CFG0_RSVZ2 0x20000000 +#define NALB_SMON_CFG0_VERSION 0xC0000000 +#define NALB_SMON_CFG0_SMON_ENABLE_LOC 0 +#define NALB_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define NALB_SMON_CFG0_RSVZ0_LOC 2 +#define NALB_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define NALB_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define NALB_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define NALB_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define NALB_SMON_CFG0_SMON_MODE_LOC 12 +#define NALB_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define NALB_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define NALB_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define NALB_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define NALB_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define NALB_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define NALB_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define NALB_SMON_CFG0_RSVZ1_LOC 23 +#define NALB_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define NALB_SMON_CFG0_RSVZ2_LOC 29 +#define NALB_SMON_CFG0_VERSION_LOC 30 + +#define NALB_SMON_CFG1 0x8c000078 +#define NALB_SMON_CFG1_RST 0x0 + +#define NALB_SMON_CFG1_MODE0 0x000000FF +#define NALB_SMON_CFG1_MODE1 0x0000FF00 +#define NALB_SMON_CFG1_RSVZ0 0xFFFF0000 +#define NALB_SMON_CFG1_MODE0_LOC 0 +#define NALB_SMON_CFG1_MODE1_LOC 8 +#define NALB_SMON_CFG1_RSVZ0_LOC 16 + +#define NALB_SMON_MAX_TMR 0x8c00007c +#define NALB_SMON_MAX_TMR_RST 0x0 + +#define NALB_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define NALB_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define NALB_SMON_TMR 0x8c000080 +#define NALB_SMON_TMR_RST 0x0 + +#define NALB_SMON_TMR_TIMER 0xFFFFFFFF +#define NALB_SMON_TMR_TIMER_LOC 0 + +#define RO_GRP_0_SLT_SHFT(x) \ + (0x96000000 + (x) * 0x4) +#define RO_GRP_0_SLT_SHFT_RST 0x0 + +#define RO_GRP_0_SLT_SHFT_CHANGE 0x000003FF +#define RO_GRP_0_SLT_SHFT_RSVD0 0xFFFFFC00 +#define RO_GRP_0_SLT_SHFT_CHANGE_LOC 0 +#define RO_GRP_0_SLT_SHFT_RSVD0_LOC 10 + +#define RO_GRP_1_SLT_SHFT(x) \ + (0x96010000 + (x) * 0x4) +#define RO_GRP_1_SLT_SHFT_RST 0x0 + +#define RO_GRP_1_SLT_SHFT_CHANGE 0x000003FF +#define RO_GRP_1_SLT_SHFT_RSVD0 0xFFFFFC00 +#define RO_GRP_1_SLT_SHFT_CHANGE_LOC 0 +#define RO_GRP_1_SLT_SHFT_RSVD0_LOC 10 + +#define RO_GRP_SN_MODE 0x94000000 +#define RO_GRP_SN_MODE_RST 0x0 + +#define RO_GRP_SN_MODE_SN_MODE_0 0x00000007 +#define RO_GRP_SN_MODE_RSZV0 0x000000F8 +#define RO_GRP_SN_MODE_SN_MODE_1 0x00000700 +#define RO_GRP_SN_MODE_RSZV1 0xFFFFF800 +#define RO_GRP_SN_MODE_SN_MODE_0_LOC 0 +#define RO_GRP_SN_MODE_RSZV0_LOC 3 +#define RO_GRP_SN_MODE_SN_MODE_1_LOC 8 +#define RO_GRP_SN_MODE_RSZV1_LOC 11 + +#define RO_CFG_CTRL_GENERAL_0 0x9c000000 +#define RO_CFG_CTRL_GENERAL_0_RST 0x0 + +#define RO_CFG_CTRL_GENERAL_0_UNIT_SINGLE_STEP_MODE 0x00000001 +#define RO_CFG_CTRL_GENERAL_0_RR_EN 0x00000002 +#define RO_CFG_CTRL_GENERAL_0_RSZV0 0xFFFFFFFC +#define RO_CFG_CTRL_GENERAL_0_UNIT_SINGLE_STEP_MODE_LOC 0 +#define RO_CFG_CTRL_GENERAL_0_RR_EN_LOC 1 +#define RO_CFG_CTRL_GENERAL_0_RSZV0_LOC 2 + +#define RO_SMON_ACTIVITYCNTR0 0x9c000030 +#define RO_SMON_ACTIVITYCNTR0_RST 0x0 + +#define RO_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define RO_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define RO_SMON_ACTIVITYCNTR1 0x9c000034 +#define RO_SMON_ACTIVITYCNTR1_RST 0x0 + +#define RO_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define RO_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define RO_SMON_COMPARE0 0x9c000038 +#define RO_SMON_COMPARE0_RST 0x0 + +#define RO_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define RO_SMON_COMPARE0_COMPARE0_LOC 0 + +#define RO_SMON_COMPARE1 0x9c00003c +#define RO_SMON_COMPARE1_RST 0x0 + +#define RO_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define RO_SMON_COMPARE1_COMPARE1_LOC 0 + +#define RO_SMON_CFG0 0x9c000040 +#define RO_SMON_CFG0_RST 0x40000000 + +#define RO_SMON_CFG0_SMON_ENABLE 0x00000001 +#define RO_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define RO_SMON_CFG0_RSVZ0 0x0000000C +#define RO_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define RO_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define RO_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define RO_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define RO_SMON_CFG0_SMON_MODE 0x0000F000 +#define RO_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define RO_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define RO_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define RO_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define RO_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define RO_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define RO_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define RO_SMON_CFG0_RSVZ1 0x00800000 +#define RO_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define RO_SMON_CFG0_RSVZ2 0x20000000 +#define RO_SMON_CFG0_VERSION 0xC0000000 +#define RO_SMON_CFG0_SMON_ENABLE_LOC 0 +#define RO_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define RO_SMON_CFG0_RSVZ0_LOC 2 +#define RO_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define RO_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define RO_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define RO_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define RO_SMON_CFG0_SMON_MODE_LOC 12 +#define RO_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define RO_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define RO_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define RO_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define RO_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define RO_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define RO_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define RO_SMON_CFG0_RSVZ1_LOC 23 +#define RO_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define RO_SMON_CFG0_RSVZ2_LOC 29 +#define RO_SMON_CFG0_VERSION_LOC 30 + +#define RO_SMON_CFG1 0x9c000044 +#define RO_SMON_CFG1_RST 0x0 + +#define RO_SMON_CFG1_MODE0 0x000000FF +#define RO_SMON_CFG1_MODE1 0x0000FF00 +#define RO_SMON_CFG1_RSVZ0 0xFFFF0000 +#define RO_SMON_CFG1_MODE0_LOC 0 +#define RO_SMON_CFG1_MODE1_LOC 8 +#define RO_SMON_CFG1_RSVZ0_LOC 16 + +#define RO_SMON_MAX_TMR 0x9c000048 +#define RO_SMON_MAX_TMR_RST 0x0 + +#define RO_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define RO_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define RO_SMON_TMR 0x9c00004c +#define RO_SMON_TMR_RST 0x0 + +#define RO_SMON_TMR_TIMER 0xFFFFFFFF +#define RO_SMON_TMR_TIMER_LOC 0 + +#define LSP_CQ2PRIOV(x) \ + (0xa0000000 + (x) * 0x1000) +#define LSP_CQ2PRIOV_RST 0x0 + +#define LSP_CQ2PRIOV_PRIO 0x00FFFFFF +#define LSP_CQ2PRIOV_V 0xFF000000 +#define LSP_CQ2PRIOV_PRIO_LOC 0 +#define LSP_CQ2PRIOV_V_LOC 24 + +#define LSP_CQ2QID0(x) \ + (0xa0080000 + (x) * 0x1000) +#define LSP_CQ2QID0_RST 0x0 + +#define LSP_CQ2QID0_QID_P0 0x0000007F +#define LSP_CQ2QID0_RSVD3 0x00000080 +#define LSP_CQ2QID0_QID_P1 0x00007F00 +#define LSP_CQ2QID0_RSVD2 0x00008000 +#define LSP_CQ2QID0_QID_P2 0x007F0000 +#define LSP_CQ2QID0_RSVD1 0x00800000 +#define LSP_CQ2QID0_QID_P3 0x7F000000 +#define LSP_CQ2QID0_RSVD0 0x80000000 +#define LSP_CQ2QID0_QID_P0_LOC 0 +#define LSP_CQ2QID0_RSVD3_LOC 7 +#define LSP_CQ2QID0_QID_P1_LOC 8 +#define LSP_CQ2QID0_RSVD2_LOC 15 +#define LSP_CQ2QID0_QID_P2_LOC 16 +#define LSP_CQ2QID0_RSVD1_LOC 23 +#define LSP_CQ2QID0_QID_P3_LOC 24 +#define LSP_CQ2QID0_RSVD0_LOC 31 + +#define LSP_CQ2QID1(x) \ + (0xa0100000 + (x) * 0x1000) +#define LSP_CQ2QID1_RST 0x0 + +#define LSP_CQ2QID1_QID_P4 0x0000007F +#define LSP_CQ2QID1_RSVD3 0x00000080 +#define LSP_CQ2QID1_QID_P5 0x00007F00 +#define LSP_CQ2QID1_RSVD2 0x00008000 +#define LSP_CQ2QID1_QID_P6 0x007F0000 +#define LSP_CQ2QID1_RSVD1 0x00800000 +#define LSP_CQ2QID1_QID_P7 0x7F000000 +#define LSP_CQ2QID1_RSVD0 0x80000000 +#define LSP_CQ2QID1_QID_P4_LOC 0 +#define LSP_CQ2QID1_RSVD3_LOC 7 +#define LSP_CQ2QID1_QID_P5_LOC 8 +#define LSP_CQ2QID1_RSVD2_LOC 15 +#define LSP_CQ2QID1_QID_P6_LOC 16 +#define LSP_CQ2QID1_RSVD1_LOC 23 +#define LSP_CQ2QID1_QID_P7_LOC 24 +#define LSP_CQ2QID1_RSVD0_LOC 31 + +#define LSP_CQ_DIR_DSBL(x) \ + (0xa0180000 + (x) * 0x1000) +#define LSP_CQ_DIR_DSBL_RST 0x1 + +#define LSP_CQ_DIR_DSBL_DISABLED 0x00000001 +#define LSP_CQ_DIR_DSBL_RSVD0 0xFFFFFFFE +#define LSP_CQ_DIR_DSBL_DISABLED_LOC 0 +#define LSP_CQ_DIR_DSBL_RSVD0_LOC 1 + +#define LSP_CQ_DIR_TKN_CNT(x) \ + (0xa0200000 + (x) * 0x1000) +#define LSP_CQ_DIR_TKN_CNT_RST 0x0 + +#define LSP_CQ_DIR_TKN_CNT_COUNT 0x00001FFF +#define LSP_CQ_DIR_TKN_CNT_RSVD0 0xFFFFE000 +#define LSP_CQ_DIR_TKN_CNT_COUNT_LOC 0 +#define LSP_CQ_DIR_TKN_CNT_RSVD0_LOC 13 + +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI(x) \ + (0xa0280000 + (x) * 0x1000) +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RST 0x0 + +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_TOKEN_DEPTH_SELECT 0x0000000F +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_DISABLE_WB_OPT 0x00000010 +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_IGNORE_DEPTH 0x00000020 +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RSVD0 0xFFFFFFC0 +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_TOKEN_DEPTH_SELECT_LOC 0 +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_DISABLE_WB_OPT_LOC 4 +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_IGNORE_DEPTH_LOC 5 +#define LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RSVD0_LOC 6 + +#define LSP_CQ_DIR_TOT_SCH_CNTL(x) \ + (0xa0300000 + (x) * 0x1000) +#define LSP_CQ_DIR_TOT_SCH_CNTL_RST 0x0 + +#define LSP_CQ_DIR_TOT_SCH_CNTL_COUNT 0xFFFFFFFF +#define LSP_CQ_DIR_TOT_SCH_CNTL_COUNT_LOC 0 + +#define LSP_CQ_DIR_TOT_SCH_CNTH(x) \ + (0xa0380000 + (x) * 0x1000) +#define LSP_CQ_DIR_TOT_SCH_CNTH_RST 0x0 + +#define LSP_CQ_DIR_TOT_SCH_CNTH_COUNT 0xFFFFFFFF +#define LSP_CQ_DIR_TOT_SCH_CNTH_COUNT_LOC 0 + +#define LSP_CQ_LDB_DSBL(x) \ + (0xa0400000 + (x) * 0x1000) +#define LSP_CQ_LDB_DSBL_RST 0x1 + +#define LSP_CQ_LDB_DSBL_DISABLED 0x00000001 +#define LSP_CQ_LDB_DSBL_RSVD0 0xFFFFFFFE +#define LSP_CQ_LDB_DSBL_DISABLED_LOC 0 +#define LSP_CQ_LDB_DSBL_RSVD0_LOC 1 + +#define LSP_CQ_LDB_INFL_CNT(x) \ + (0xa0480000 + (x) * 0x1000) +#define LSP_CQ_LDB_INFL_CNT_RST 0x0 + +#define LSP_CQ_LDB_INFL_CNT_COUNT 0x00000FFF +#define LSP_CQ_LDB_INFL_CNT_RSVD0 0xFFFFF000 +#define LSP_CQ_LDB_INFL_CNT_COUNT_LOC 0 +#define LSP_CQ_LDB_INFL_CNT_RSVD0_LOC 12 + +#define LSP_CQ_LDB_INFL_LIM(x) \ + (0xa0500000 + (x) * 0x1000) +#define LSP_CQ_LDB_INFL_LIM_RST 0x0 + +#define LSP_CQ_LDB_INFL_LIM_LIMIT 0x00000FFF +#define LSP_CQ_LDB_INFL_LIM_RSVD0 0xFFFFF000 +#define LSP_CQ_LDB_INFL_LIM_LIMIT_LOC 0 +#define LSP_CQ_LDB_INFL_LIM_RSVD0_LOC 12 + +#define LSP_CQ_LDB_TKN_CNT(x) \ + (0xa0580000 + (x) * 0x1000) +#define LSP_CQ_LDB_TKN_CNT_RST 0x0 + +#define LSP_CQ_LDB_TKN_CNT_TOKEN_COUNT 0x000007FF +#define LSP_CQ_LDB_TKN_CNT_RSVD0 0xFFFFF800 +#define LSP_CQ_LDB_TKN_CNT_TOKEN_COUNT_LOC 0 +#define LSP_CQ_LDB_TKN_CNT_RSVD0_LOC 11 + +#define LSP_CQ_LDB_TKN_DEPTH_SEL(x) \ + (0xa0600000 + (x) * 0x1000) +#define LSP_CQ_LDB_TKN_DEPTH_SEL_RST 0x0 + +#define LSP_CQ_LDB_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT 0x0000000F +#define LSP_CQ_LDB_TKN_DEPTH_SEL_IGNORE_DEPTH 0x00000010 +#define LSP_CQ_LDB_TKN_DEPTH_SEL_RSVD0 0xFFFFFFE0 +#define LSP_CQ_LDB_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_LOC 0 +#define LSP_CQ_LDB_TKN_DEPTH_SEL_IGNORE_DEPTH_LOC 4 +#define LSP_CQ_LDB_TKN_DEPTH_SEL_RSVD0_LOC 5 + +#define LSP_CQ_LDB_TOT_SCH_CNTL(x) \ + (0xa0680000 + (x) * 0x1000) +#define LSP_CQ_LDB_TOT_SCH_CNTL_RST 0x0 + +#define LSP_CQ_LDB_TOT_SCH_CNTL_COUNT 0xFFFFFFFF +#define LSP_CQ_LDB_TOT_SCH_CNTL_COUNT_LOC 0 + +#define LSP_CQ_LDB_TOT_SCH_CNTH(x) \ + (0xa0700000 + (x) * 0x1000) +#define LSP_CQ_LDB_TOT_SCH_CNTH_RST 0x0 + +#define LSP_CQ_LDB_TOT_SCH_CNTH_COUNT 0xFFFFFFFF +#define LSP_CQ_LDB_TOT_SCH_CNTH_COUNT_LOC 0 + +#define LSP_QID_DIR_MAX_DEPTH(x) \ + (0xa0780000 + (x) * 0x1000) +#define LSP_QID_DIR_MAX_DEPTH_RST 0x0 + +#define LSP_QID_DIR_MAX_DEPTH_DEPTH 0x00001FFF +#define LSP_QID_DIR_MAX_DEPTH_RSVD0 0xFFFFE000 +#define LSP_QID_DIR_MAX_DEPTH_DEPTH_LOC 0 +#define LSP_QID_DIR_MAX_DEPTH_RSVD0_LOC 13 + +#define LSP_QID_DIR_TOT_ENQ_CNTL(x) \ + (0xa0800000 + (x) * 0x1000) +#define LSP_QID_DIR_TOT_ENQ_CNTL_RST 0x0 + +#define LSP_QID_DIR_TOT_ENQ_CNTL_COUNT 0xFFFFFFFF +#define LSP_QID_DIR_TOT_ENQ_CNTL_COUNT_LOC 0 + +#define LSP_QID_DIR_TOT_ENQ_CNTH(x) \ + (0xa0880000 + (x) * 0x1000) +#define LSP_QID_DIR_TOT_ENQ_CNTH_RST 0x0 + +#define LSP_QID_DIR_TOT_ENQ_CNTH_COUNT 0xFFFFFFFF +#define LSP_QID_DIR_TOT_ENQ_CNTH_COUNT_LOC 0 + +#define LSP_QID_DIR_ENQUEUE_CNT(x) \ + (0xa0900000 + (x) * 0x1000) +#define LSP_QID_DIR_ENQUEUE_CNT_RST 0x0 + +#define LSP_QID_DIR_ENQUEUE_CNT_COUNT 0x00001FFF +#define LSP_QID_DIR_ENQUEUE_CNT_RSVD0 0xFFFFE000 +#define LSP_QID_DIR_ENQUEUE_CNT_COUNT_LOC 0 +#define LSP_QID_DIR_ENQUEUE_CNT_RSVD0_LOC 13 + +#define LSP_QID_DIR_DEPTH_THRSH(x) \ + (0xa0980000 + (x) * 0x1000) +#define LSP_QID_DIR_DEPTH_THRSH_RST 0x0 + +#define LSP_QID_DIR_DEPTH_THRSH_THRESH 0x00001FFF +#define LSP_QID_DIR_DEPTH_THRSH_RSVD0 0xFFFFE000 +#define LSP_QID_DIR_DEPTH_THRSH_THRESH_LOC 0 +#define LSP_QID_DIR_DEPTH_THRSH_RSVD0_LOC 13 + +#define LSP_QID_AQED_ACTIVE_CNT(x) \ + (0xa0a00000 + (x) * 0x1000) +#define LSP_QID_AQED_ACTIVE_CNT_RST 0x0 + +#define LSP_QID_AQED_ACTIVE_CNT_COUNT 0x00000FFF +#define LSP_QID_AQED_ACTIVE_CNT_RSVD0 0xFFFFF000 +#define LSP_QID_AQED_ACTIVE_CNT_COUNT_LOC 0 +#define LSP_QID_AQED_ACTIVE_CNT_RSVD0_LOC 12 + +#define LSP_QID_AQED_ACTIVE_LIM(x) \ + (0xa0a80000 + (x) * 0x1000) +#define LSP_QID_AQED_ACTIVE_LIM_RST 0x0 + +#define LSP_QID_AQED_ACTIVE_LIM_LIMIT 0x00000FFF +#define LSP_QID_AQED_ACTIVE_LIM_RSVD0 0xFFFFF000 +#define LSP_QID_AQED_ACTIVE_LIM_LIMIT_LOC 0 +#define LSP_QID_AQED_ACTIVE_LIM_RSVD0_LOC 12 + +#define LSP_QID_ATM_TOT_ENQ_CNTL(x) \ + (0xa0b00000 + (x) * 0x1000) +#define LSP_QID_ATM_TOT_ENQ_CNTL_RST 0x0 + +#define LSP_QID_ATM_TOT_ENQ_CNTL_COUNT 0xFFFFFFFF +#define LSP_QID_ATM_TOT_ENQ_CNTL_COUNT_LOC 0 + +#define LSP_QID_ATM_TOT_ENQ_CNTH(x) \ + (0xa0b80000 + (x) * 0x1000) +#define LSP_QID_ATM_TOT_ENQ_CNTH_RST 0x0 + +#define LSP_QID_ATM_TOT_ENQ_CNTH_COUNT 0xFFFFFFFF +#define LSP_QID_ATM_TOT_ENQ_CNTH_COUNT_LOC 0 + +#define LSP_QID_ATQ_ENQUEUE_CNT(x) \ + (0xa0c00000 + (x) * 0x1000) +#define LSP_QID_ATQ_ENQUEUE_CNT_RST 0x0 + +#define LSP_QID_ATQ_ENQUEUE_CNT_COUNT 0x00003FFF +#define LSP_QID_ATQ_ENQUEUE_CNT_RSVD0 0xFFFFC000 +#define LSP_QID_ATQ_ENQUEUE_CNT_COUNT_LOC 0 +#define LSP_QID_ATQ_ENQUEUE_CNT_RSVD0_LOC 14 + +#define LSP_QID_LDB_ENQUEUE_CNT(x) \ + (0xa0c80000 + (x) * 0x1000) +#define LSP_QID_LDB_ENQUEUE_CNT_RST 0x0 + +#define LSP_QID_LDB_ENQUEUE_CNT_COUNT 0x00003FFF +#define LSP_QID_LDB_ENQUEUE_CNT_RSVD0 0xFFFFC000 +#define LSP_QID_LDB_ENQUEUE_CNT_COUNT_LOC 0 +#define LSP_QID_LDB_ENQUEUE_CNT_RSVD0_LOC 14 + +#define LSP_QID_LDB_INFL_CNT(x) \ + (0xa0d00000 + (x) * 0x1000) +#define LSP_QID_LDB_INFL_CNT_RST 0x0 + +#define LSP_QID_LDB_INFL_CNT_COUNT 0x00000FFF +#define LSP_QID_LDB_INFL_CNT_RSVD0 0xFFFFF000 +#define LSP_QID_LDB_INFL_CNT_COUNT_LOC 0 +#define LSP_QID_LDB_INFL_CNT_RSVD0_LOC 12 + +#define LSP_QID_LDB_INFL_LIM(x) \ + (0xa0d80000 + (x) * 0x1000) +#define LSP_QID_LDB_INFL_LIM_RST 0x0 + +#define LSP_QID_LDB_INFL_LIM_LIMIT 0x00000FFF +#define LSP_QID_LDB_INFL_LIM_RSVD0 0xFFFFF000 +#define LSP_QID_LDB_INFL_LIM_LIMIT_LOC 0 +#define LSP_QID_LDB_INFL_LIM_RSVD0_LOC 12 + +#define LSP_QID2CQIDIX_00(x) \ + (0xa0e00000 + (x) * 0x1000) +#define LSP_QID2CQIDIX_00_RST 0x0 +#define LSP_QID2CQIDIX(x, y) \ + (LSP_QID2CQIDIX_00(x) + 0x80000 * (y)) +#define LSP_QID2CQIDIX_NUM 16 + +#define LSP_QID2CQIDIX_00_CQ_P0 0x000000FF +#define LSP_QID2CQIDIX_00_CQ_P1 0x0000FF00 +#define LSP_QID2CQIDIX_00_CQ_P2 0x00FF0000 +#define LSP_QID2CQIDIX_00_CQ_P3 0xFF000000 +#define LSP_QID2CQIDIX_00_CQ_P0_LOC 0 +#define LSP_QID2CQIDIX_00_CQ_P1_LOC 8 +#define LSP_QID2CQIDIX_00_CQ_P2_LOC 16 +#define LSP_QID2CQIDIX_00_CQ_P3_LOC 24 + +#define LSP_QID2CQIDIX2_00(x) \ + (0xa1600000 + (x) * 0x1000) +#define LSP_QID2CQIDIX2_00_RST 0x0 +#define LSP_QID2CQIDIX2(x, y) \ + (LSP_QID2CQIDIX2_00(x) + 0x80000 * (y)) +#define LSP_QID2CQIDIX2_NUM 16 + +#define LSP_QID2CQIDIX2_00_CQ_P0 0x000000FF +#define LSP_QID2CQIDIX2_00_CQ_P1 0x0000FF00 +#define LSP_QID2CQIDIX2_00_CQ_P2 0x00FF0000 +#define LSP_QID2CQIDIX2_00_CQ_P3 0xFF000000 +#define LSP_QID2CQIDIX2_00_CQ_P0_LOC 0 +#define LSP_QID2CQIDIX2_00_CQ_P1_LOC 8 +#define LSP_QID2CQIDIX2_00_CQ_P2_LOC 16 +#define LSP_QID2CQIDIX2_00_CQ_P3_LOC 24 + +#define LSP_QID_LDB_REPLAY_CNT(x) \ + (0xa1e00000 + (x) * 0x1000) +#define LSP_QID_LDB_REPLAY_CNT_RST 0x0 + +#define LSP_QID_LDB_REPLAY_CNT_COUNT 0x00003FFF +#define LSP_QID_LDB_REPLAY_CNT_RSVD0 0xFFFFC000 +#define LSP_QID_LDB_REPLAY_CNT_COUNT_LOC 0 +#define LSP_QID_LDB_REPLAY_CNT_RSVD0_LOC 14 + +#define LSP_QID_NALDB_MAX_DEPTH(x) \ + (0xa1f00000 + (x) * 0x1000) +#define LSP_QID_NALDB_MAX_DEPTH_RST 0x0 + +#define LSP_QID_NALDB_MAX_DEPTH_DEPTH 0x00003FFF +#define LSP_QID_NALDB_MAX_DEPTH_RSVD0 0xFFFFC000 +#define LSP_QID_NALDB_MAX_DEPTH_DEPTH_LOC 0 +#define LSP_QID_NALDB_MAX_DEPTH_RSVD0_LOC 14 + +#define LSP_QID_NALDB_TOT_ENQ_CNTL(x) \ + (0xa1f80000 + (x) * 0x1000) +#define LSP_QID_NALDB_TOT_ENQ_CNTL_RST 0x0 + +#define LSP_QID_NALDB_TOT_ENQ_CNTL_COUNT 0xFFFFFFFF +#define LSP_QID_NALDB_TOT_ENQ_CNTL_COUNT_LOC 0 + +#define LSP_QID_NALDB_TOT_ENQ_CNTH(x) \ + (0xa2000000 + (x) * 0x1000) +#define LSP_QID_NALDB_TOT_ENQ_CNTH_RST 0x0 + +#define LSP_QID_NALDB_TOT_ENQ_CNTH_COUNT 0xFFFFFFFF +#define LSP_QID_NALDB_TOT_ENQ_CNTH_COUNT_LOC 0 + +#define LSP_QID_ATM_DEPTH_THRSH(x) \ + (0xa2080000 + (x) * 0x1000) +#define LSP_QID_ATM_DEPTH_THRSH_RST 0x0 + +#define LSP_QID_ATM_DEPTH_THRSH_THRESH 0x00003FFF +#define LSP_QID_ATM_DEPTH_THRSH_RSVD0 0xFFFFC000 +#define LSP_QID_ATM_DEPTH_THRSH_THRESH_LOC 0 +#define LSP_QID_ATM_DEPTH_THRSH_RSVD0_LOC 14 + +#define LSP_QID_NALDB_DEPTH_THRSH(x) \ + (0xa2100000 + (x) * 0x1000) +#define LSP_QID_NALDB_DEPTH_THRSH_RST 0x0 + +#define LSP_QID_NALDB_DEPTH_THRSH_THRESH 0x00003FFF +#define LSP_QID_NALDB_DEPTH_THRSH_RSVD0 0xFFFFC000 +#define LSP_QID_NALDB_DEPTH_THRSH_THRESH_LOC 0 +#define LSP_QID_NALDB_DEPTH_THRSH_RSVD0_LOC 14 + +#define LSP_QID_ATM_ACTIVE(x) \ + (0xa2180000 + (x) * 0x1000) +#define LSP_QID_ATM_ACTIVE_RST 0x0 + +#define LSP_QID_ATM_ACTIVE_COUNT 0x00003FFF +#define LSP_QID_ATM_ACTIVE_RSVD0 0xFFFFC000 +#define LSP_QID_ATM_ACTIVE_COUNT_LOC 0 +#define LSP_QID_ATM_ACTIVE_RSVD0_LOC 14 + +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0 0xa4000008 +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_RST 0x0 + +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI0_WEIGHT 0x000000FF +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI1_WEIGHT 0x0000FF00 +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI2_WEIGHT 0x00FF0000 +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI3_WEIGHT 0xFF000000 +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI0_WEIGHT_LOC 0 +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI1_WEIGHT_LOC 8 +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI2_WEIGHT_LOC 16 +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI3_WEIGHT_LOC 24 + +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1 0xa400000c +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_RST 0x0 + +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_RSVZ0 0xFFFFFFFF +#define LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_RSVZ0_LOC 0 + +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0 0xa4000014 +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_RST 0x0 + +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI0_WEIGHT 0x000000FF +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI1_WEIGHT 0x0000FF00 +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI2_WEIGHT 0x00FF0000 +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI3_WEIGHT 0xFF000000 +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI0_WEIGHT_LOC 0 +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI1_WEIGHT_LOC 8 +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI2_WEIGHT_LOC 16 +#define LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI3_WEIGHT_LOC 24 + +#define LSP_CFG_ARB_WEIGHT_LDB_QID_1 0xa4000018 +#define LSP_CFG_ARB_WEIGHT_LDB_QID_1_RST 0x0 + +#define LSP_CFG_ARB_WEIGHT_LDB_QID_1_RSVZ0 0xFFFFFFFF +#define LSP_CFG_ARB_WEIGHT_LDB_QID_1_RSVZ0_LOC 0 + +#define LSP_LDB_SCHED_CTRL 0xa400002c +#define LSP_LDB_SCHED_CTRL_RST 0x0 + +#define LSP_LDB_SCHED_CTRL_CQ 0x000000FF +#define LSP_LDB_SCHED_CTRL_QIDIX 0x00000700 +#define LSP_LDB_SCHED_CTRL_VALUE 0x00000800 +#define LSP_LDB_SCHED_CTRL_NALB_HASWORK_V 0x00001000 +#define LSP_LDB_SCHED_CTRL_RLIST_HASWORK_V 0x00002000 +#define LSP_LDB_SCHED_CTRL_SLIST_HASWORK_V 0x00004000 +#define LSP_LDB_SCHED_CTRL_INFLIGHT_OK_V 0x00008000 +#define LSP_LDB_SCHED_CTRL_AQED_NFULL_V 0x00010000 +#define LSP_LDB_SCHED_CTRL_RSVZ0 0xFFFE0000 +#define LSP_LDB_SCHED_CTRL_CQ_LOC 0 +#define LSP_LDB_SCHED_CTRL_QIDIX_LOC 8 +#define LSP_LDB_SCHED_CTRL_VALUE_LOC 11 +#define LSP_LDB_SCHED_CTRL_NALB_HASWORK_V_LOC 12 +#define LSP_LDB_SCHED_CTRL_RLIST_HASWORK_V_LOC 13 +#define LSP_LDB_SCHED_CTRL_SLIST_HASWORK_V_LOC 14 +#define LSP_LDB_SCHED_CTRL_INFLIGHT_OK_V_LOC 15 +#define LSP_LDB_SCHED_CTRL_AQED_NFULL_V_LOC 16 +#define LSP_LDB_SCHED_CTRL_RSVZ0_LOC 17 + +#define LSP_DIR_SCH_CNT_L 0xa4000034 +#define LSP_DIR_SCH_CNT_L_RST 0x0 + +#define LSP_DIR_SCH_CNT_L_COUNT 0xFFFFFFFF +#define LSP_DIR_SCH_CNT_L_COUNT_LOC 0 + +#define LSP_DIR_SCH_CNT_H 0xa4000038 +#define LSP_DIR_SCH_CNT_H_RST 0x0 + +#define LSP_DIR_SCH_CNT_H_COUNT 0xFFFFFFFF +#define LSP_DIR_SCH_CNT_H_COUNT_LOC 0 + +#define LSP_LDB_SCH_CNT_L 0xa400003c +#define LSP_LDB_SCH_CNT_L_RST 0x0 + +#define LSP_LDB_SCH_CNT_L_COUNT 0xFFFFFFFF +#define LSP_LDB_SCH_CNT_L_COUNT_LOC 0 + +#define LSP_LDB_SCH_CNT_H 0xa4000040 +#define LSP_LDB_SCH_CNT_H_RST 0x0 + +#define LSP_LDB_SCH_CNT_H_COUNT 0xFFFFFFFF +#define LSP_LDB_SCH_CNT_H_COUNT_LOC 0 + +#define LSP_CFG_SHDW_CTRL 0xa4000070 +#define LSP_CFG_SHDW_CTRL_RST 0x0 + +#define LSP_CFG_SHDW_CTRL_TRANSFER 0x00000001 +#define LSP_CFG_SHDW_CTRL_RSVD0 0xFFFFFFFE +#define LSP_CFG_SHDW_CTRL_TRANSFER_LOC 0 +#define LSP_CFG_SHDW_CTRL_RSVD0_LOC 1 + +#define LSP_CFG_SHDW_RANGE_COS(x) \ + (0xa4000074 + (x) * 4) +#define LSP_CFG_SHDW_RANGE_COS_RST 0x40 + +#define LSP_CFG_SHDW_RANGE_COS_BW_RANGE 0x000001FF +#define LSP_CFG_SHDW_RANGE_COS_RSVZ0 0x7FFFFE00 +#define LSP_CFG_SHDW_RANGE_COS_NO_EXTRA_CREDIT 0x80000000 +#define LSP_CFG_SHDW_RANGE_COS_BW_RANGE_LOC 0 +#define LSP_CFG_SHDW_RANGE_COS_RSVZ0_LOC 9 +#define LSP_CFG_SHDW_RANGE_COS_NO_EXTRA_CREDIT_LOC 31 + +#define LSP_CFG_CTRL_GENERAL_0 0xac000000 +#define LSP_CFG_CTRL_GENERAL_0_RST 0x0 + +#define LSP_CFG_CTRL_GENERAL_0_DISAB_ATQ_EMPTY_ARB 0x00000001 +#define LSP_CFG_CTRL_GENERAL_0_INC_TOK_UNIT_IDLE 0x00000002 +#define LSP_CFG_CTRL_GENERAL_0_DISAB_RLIST_PRI 0x00000004 +#define LSP_CFG_CTRL_GENERAL_0_INC_CMP_UNIT_IDLE 0x00000008 +#define LSP_CFG_CTRL_GENERAL_0_RSVZ0 0x00000030 +#define LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OP 0x00000040 +#define LSP_CFG_CTRL_GENERAL_0_DIR_HALF_BW 0x00000080 +#define LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OUT 0x00000100 +#define LSP_CFG_CTRL_GENERAL_0_DIR_DISAB_MULTI 0x00000200 +#define LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OP 0x00000400 +#define LSP_CFG_CTRL_GENERAL_0_ATQ_HALF_BW 0x00000800 +#define LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OUT 0x00001000 +#define LSP_CFG_CTRL_GENERAL_0_ATQ_DISAB_MULTI 0x00002000 +#define LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OP 0x00004000 +#define LSP_CFG_CTRL_GENERAL_0_DIRRPL_HALF_BW 0x00008000 +#define LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OUT 0x00010000 +#define LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OP 0x00020000 +#define LSP_CFG_CTRL_GENERAL_0_LBRPL_HALF_BW 0x00040000 +#define LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OUT 0x00080000 +#define LSP_CFG_CTRL_GENERAL_0_LDB_SINGLE_OP 0x00100000 +#define LSP_CFG_CTRL_GENERAL_0_LDB_HALF_BW 0x00200000 +#define LSP_CFG_CTRL_GENERAL_0_LDB_DISAB_MULTI 0x00400000 +#define LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_SCH 0x00800000 +#define LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_CMP 0x01000000 +#define LSP_CFG_CTRL_GENERAL_0_LDB_CE_TOG_ARB 0x02000000 +#define LSP_CFG_CTRL_GENERAL_0_RSVZ1 0x04000000 +#define LSP_CFG_CTRL_GENERAL_0_SMON0_VALID_SEL 0x18000000 +#define LSP_CFG_CTRL_GENERAL_0_SMON0_VALUE_SEL 0x20000000 +#define LSP_CFG_CTRL_GENERAL_0_SMON0_COMPARE_SEL 0xC0000000 +#define LSP_CFG_CTRL_GENERAL_0_DISAB_ATQ_EMPTY_ARB_LOC 0 +#define LSP_CFG_CTRL_GENERAL_0_INC_TOK_UNIT_IDLE_LOC 1 +#define LSP_CFG_CTRL_GENERAL_0_DISAB_RLIST_PRI_LOC 2 +#define LSP_CFG_CTRL_GENERAL_0_INC_CMP_UNIT_IDLE_LOC 3 +#define LSP_CFG_CTRL_GENERAL_0_RSVZ0_LOC 4 +#define LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OP_LOC 6 +#define LSP_CFG_CTRL_GENERAL_0_DIR_HALF_BW_LOC 7 +#define LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OUT_LOC 8 +#define LSP_CFG_CTRL_GENERAL_0_DIR_DISAB_MULTI_LOC 9 +#define LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OP_LOC 10 +#define LSP_CFG_CTRL_GENERAL_0_ATQ_HALF_BW_LOC 11 +#define LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OUT_LOC 12 +#define LSP_CFG_CTRL_GENERAL_0_ATQ_DISAB_MULTI_LOC 13 +#define LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OP_LOC 14 +#define LSP_CFG_CTRL_GENERAL_0_DIRRPL_HALF_BW_LOC 15 +#define LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OUT_LOC 16 +#define LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OP_LOC 17 +#define LSP_CFG_CTRL_GENERAL_0_LBRPL_HALF_BW_LOC 18 +#define LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OUT_LOC 19 +#define LSP_CFG_CTRL_GENERAL_0_LDB_SINGLE_OP_LOC 20 +#define LSP_CFG_CTRL_GENERAL_0_LDB_HALF_BW_LOC 21 +#define LSP_CFG_CTRL_GENERAL_0_LDB_DISAB_MULTI_LOC 22 +#define LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_SCH_LOC 23 +#define LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_CMP_LOC 24 +#define LSP_CFG_CTRL_GENERAL_0_LDB_CE_TOG_ARB_LOC 25 +#define LSP_CFG_CTRL_GENERAL_0_RSVZ1_LOC 26 +#define LSP_CFG_CTRL_GENERAL_0_SMON0_VALID_SEL_LOC 27 +#define LSP_CFG_CTRL_GENERAL_0_SMON0_VALUE_SEL_LOC 29 +#define LSP_CFG_CTRL_GENERAL_0_SMON0_COMPARE_SEL_LOC 30 + +#define LSP_SMON_COMPARE0 0xac000048 +#define LSP_SMON_COMPARE0_RST 0x0 + +#define LSP_SMON_COMPARE0_COMPARE0 0xFFFFFFFF +#define LSP_SMON_COMPARE0_COMPARE0_LOC 0 + +#define LSP_SMON_COMPARE1 0xac00004c +#define LSP_SMON_COMPARE1_RST 0x0 + +#define LSP_SMON_COMPARE1_COMPARE1 0xFFFFFFFF +#define LSP_SMON_COMPARE1_COMPARE1_LOC 0 + +#define LSP_SMON_CFG0 0xac000050 +#define LSP_SMON_CFG0_RST 0x40000000 + +#define LSP_SMON_CFG0_SMON_ENABLE 0x00000001 +#define LSP_SMON_CFG0_SMON_0TRIGGER_ENABLE 0x00000002 +#define LSP_SMON_CFG0_RSVZ0 0x0000000C +#define LSP_SMON_CFG0_SMON0_FUNCTION 0x00000070 +#define LSP_SMON_CFG0_SMON0_FUNCTION_COMPARE 0x00000080 +#define LSP_SMON_CFG0_SMON1_FUNCTION 0x00000700 +#define LSP_SMON_CFG0_SMON1_FUNCTION_COMPARE 0x00000800 +#define LSP_SMON_CFG0_SMON_MODE 0x0000F000 +#define LSP_SMON_CFG0_STOPCOUNTEROVFL 0x00010000 +#define LSP_SMON_CFG0_INTCOUNTEROVFL 0x00020000 +#define LSP_SMON_CFG0_STATCOUNTER0OVFL 0x00040000 +#define LSP_SMON_CFG0_STATCOUNTER1OVFL 0x00080000 +#define LSP_SMON_CFG0_STOPTIMEROVFL 0x00100000 +#define LSP_SMON_CFG0_INTTIMEROVFL 0x00200000 +#define LSP_SMON_CFG0_STATTIMEROVFL 0x00400000 +#define LSP_SMON_CFG0_RSVZ1 0x00800000 +#define LSP_SMON_CFG0_TIMER_PRESCALE 0x1F000000 +#define LSP_SMON_CFG0_RSVZ2 0x20000000 +#define LSP_SMON_CFG0_VERSION 0xC0000000 +#define LSP_SMON_CFG0_SMON_ENABLE_LOC 0 +#define LSP_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC 1 +#define LSP_SMON_CFG0_RSVZ0_LOC 2 +#define LSP_SMON_CFG0_SMON0_FUNCTION_LOC 4 +#define LSP_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC 7 +#define LSP_SMON_CFG0_SMON1_FUNCTION_LOC 8 +#define LSP_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC 11 +#define LSP_SMON_CFG0_SMON_MODE_LOC 12 +#define LSP_SMON_CFG0_STOPCOUNTEROVFL_LOC 16 +#define LSP_SMON_CFG0_INTCOUNTEROVFL_LOC 17 +#define LSP_SMON_CFG0_STATCOUNTER0OVFL_LOC 18 +#define LSP_SMON_CFG0_STATCOUNTER1OVFL_LOC 19 +#define LSP_SMON_CFG0_STOPTIMEROVFL_LOC 20 +#define LSP_SMON_CFG0_INTTIMEROVFL_LOC 21 +#define LSP_SMON_CFG0_STATTIMEROVFL_LOC 22 +#define LSP_SMON_CFG0_RSVZ1_LOC 23 +#define LSP_SMON_CFG0_TIMER_PRESCALE_LOC 24 +#define LSP_SMON_CFG0_RSVZ2_LOC 29 +#define LSP_SMON_CFG0_VERSION_LOC 30 + +#define LSP_SMON_CFG1 0xac000054 +#define LSP_SMON_CFG1_RST 0x0 + +#define LSP_SMON_CFG1_MODE0 0x000000FF +#define LSP_SMON_CFG1_MODE1 0x0000FF00 +#define LSP_SMON_CFG1_RSVZ0 0xFFFF0000 +#define LSP_SMON_CFG1_MODE0_LOC 0 +#define LSP_SMON_CFG1_MODE1_LOC 8 +#define LSP_SMON_CFG1_RSVZ0_LOC 16 + +#define LSP_SMON_ACTIVITYCNTR0 0xac000058 +#define LSP_SMON_ACTIVITYCNTR0_RST 0x0 + +#define LSP_SMON_ACTIVITYCNTR0_COUNTER0 0xFFFFFFFF +#define LSP_SMON_ACTIVITYCNTR0_COUNTER0_LOC 0 + +#define LSP_SMON_ACTIVITYCNTR1 0xac00005c +#define LSP_SMON_ACTIVITYCNTR1_RST 0x0 + +#define LSP_SMON_ACTIVITYCNTR1_COUNTER1 0xFFFFFFFF +#define LSP_SMON_ACTIVITYCNTR1_COUNTER1_LOC 0 + +#define LSP_SMON_MAX_TMR 0xac000060 +#define LSP_SMON_MAX_TMR_RST 0x0 + +#define LSP_SMON_MAX_TMR_MAXVALUE 0xFFFFFFFF +#define LSP_SMON_MAX_TMR_MAXVALUE_LOC 0 + +#define LSP_SMON_TMR 0xac000064 +#define LSP_SMON_TMR_RST 0x0 + +#define LSP_SMON_TMR_TIMER 0xFFFFFFFF +#define LSP_SMON_TMR_TIMER_LOC 0 + +#define CM_DIAG_RESET_STS 0xb4000000 +#define CM_DIAG_RESET_STS_RST 0x80000bff + +#define CM_DIAG_RESET_STS_CHP_PF_RESET_DONE 0x00000001 +#define CM_DIAG_RESET_STS_ROP_PF_RESET_DONE 0x00000002 +#define CM_DIAG_RESET_STS_LSP_PF_RESET_DONE 0x00000004 +#define CM_DIAG_RESET_STS_NALB_PF_RESET_DONE 0x00000008 +#define CM_DIAG_RESET_STS_AP_PF_RESET_DONE 0x00000010 +#define CM_DIAG_RESET_STS_DP_PF_RESET_DONE 0x00000020 +#define CM_DIAG_RESET_STS_QED_PF_RESET_DONE 0x00000040 +#define CM_DIAG_RESET_STS_DQED_PF_RESET_DONE 0x00000080 +#define CM_DIAG_RESET_STS_AQED_PF_RESET_DONE 0x00000100 +#define CM_DIAG_RESET_STS_SYS_PF_RESET_DONE 0x00000200 +#define CM_DIAG_RESET_STS_PF_RESET_ACTIVE 0x00000400 +#define CM_DIAG_RESET_STS_FLRSM_STATE 0x0003F800 +#define CM_DIAG_RESET_STS_RSVD0 0x7FFC0000 +#define CM_DIAG_RESET_STS_DLB_PROC_RESET_DONE 0x80000000 +#define CM_DIAG_RESET_STS_CHP_PF_RESET_DONE_LOC 0 +#define CM_DIAG_RESET_STS_ROP_PF_RESET_DONE_LOC 1 +#define CM_DIAG_RESET_STS_LSP_PF_RESET_DONE_LOC 2 +#define CM_DIAG_RESET_STS_NALB_PF_RESET_DONE_LOC 3 +#define CM_DIAG_RESET_STS_AP_PF_RESET_DONE_LOC 4 +#define CM_DIAG_RESET_STS_DP_PF_RESET_DONE_LOC 5 +#define CM_DIAG_RESET_STS_QED_PF_RESET_DONE_LOC 6 +#define CM_DIAG_RESET_STS_DQED_PF_RESET_DONE_LOC 7 +#define CM_DIAG_RESET_STS_AQED_PF_RESET_DONE_LOC 8 +#define CM_DIAG_RESET_STS_SYS_PF_RESET_DONE_LOC 9 +#define CM_DIAG_RESET_STS_PF_RESET_ACTIVE_LOC 10 +#define CM_DIAG_RESET_STS_FLRSM_STATE_LOC 11 +#define CM_DIAG_RESET_STS_RSVD0_LOC 18 +#define CM_DIAG_RESET_STS_DLB_PROC_RESET_DONE_LOC 31 #define CM_CFG_DIAGNOSTIC_IDLE_STATUS 0xb4000004 #define CM_CFG_DIAGNOSTIC_IDLE_STATUS_RST 0x9d0fffff @@ -134,4 +3584,57 @@ #define CM_CFG_PM_PMCSR_DISABLE_DISABLE_LOC 0 #define CM_CFG_PM_PMCSR_DISABLE_RSVZ0_LOC 1 +#define VF_VF2PF_MAILBOX_BYTES 256 +#define VF_VF2PF_MAILBOX(x) \ + (0x1000 + (x) * 0x4) +#define VF_VF2PF_MAILBOX_RST 0x0 + +#define VF_VF2PF_MAILBOX_MSG 0xFFFFFFFF +#define VF_VF2PF_MAILBOX_MSG_LOC 0 + +#define VF_VF2PF_MAILBOX_ISR 0x1f00 +#define VF_VF2PF_MAILBOX_ISR_RST 0x0 +#define VF_SIOV_MBOX_ISR_TRIGGER 0x8000 + +#define VF_VF2PF_MAILBOX_ISR_ISR 0x00000001 +#define VF_VF2PF_MAILBOX_ISR_RSVD0 0xFFFFFFFE +#define VF_VF2PF_MAILBOX_ISR_ISR_LOC 0 +#define VF_VF2PF_MAILBOX_ISR_RSVD0_LOC 1 + +#define VF_PF2VF_MAILBOX_BYTES 64 +#define VF_PF2VF_MAILBOX(x) \ + (0x2000 + (x) * 0x4) +#define VF_PF2VF_MAILBOX_RST 0x0 + +#define VF_PF2VF_MAILBOX_MSG 0xFFFFFFFF +#define VF_PF2VF_MAILBOX_MSG_LOC 0 + +#define VF_PF2VF_MAILBOX_ISR 0x2f00 +#define VF_PF2VF_MAILBOX_ISR_RST 0x0 + +#define VF_PF2VF_MAILBOX_ISR_PF_ISR 0x00000001 +#define VF_PF2VF_MAILBOX_ISR_RSVD0 0xFFFFFFFE +#define VF_PF2VF_MAILBOX_ISR_PF_ISR_LOC 0 +#define VF_PF2VF_MAILBOX_ISR_RSVD0_LOC 1 + +#define VF_VF_MSI_ISR_PEND 0x2f10 +#define VF_VF_MSI_ISR_PEND_RST 0x0 + +#define VF_VF_MSI_ISR_PEND_ISR_PEND 0xFFFFFFFF +#define VF_VF_MSI_ISR_PEND_ISR_PEND_LOC 0 + +#define VF_VF_RESET_IN_PROGRESS 0x3000 +#define VF_VF_RESET_IN_PROGRESS_RST 0x1 + +#define VF_VF_RESET_IN_PROGRESS_RESET_IN_PROGRESS 0x00000001 +#define VF_VF_RESET_IN_PROGRESS_RSVD0 0xFFFFFFFE +#define VF_VF_RESET_IN_PROGRESS_RESET_IN_PROGRESS_LOC 0 +#define VF_VF_RESET_IN_PROGRESS_RSVD0_LOC 1 + +#define VF_VF_MSI_ISR 0x4000 +#define VF_VF_MSI_ISR_RST 0x0 + +#define VF_VF_MSI_ISR_VF_MSI_ISR 0xFFFFFFFF +#define VF_VF_MSI_ISR_VF_MSI_ISR_LOC 0 + #endif /* __DLB_REGS_H */ diff --git a/drivers/misc/dlb/dlb_resource.c b/drivers/misc/dlb/dlb_resource.c index c5b3f1ff3d7e..84f6cba6b681 100644 --- a/drivers/misc/dlb/dlb_resource.c +++ b/drivers/misc/dlb/dlb_resource.c @@ -890,6 +890,390 @@ static int dlb_domain_reset_software_state(struct dlb_hw *hw, return 0; } +static void __dlb_domain_reset_ldb_port_registers(struct dlb_hw *hw, + struct dlb_ldb_port *port) +{ + DLB_CSR_WR(hw, + SYS_LDB_PP2VAS(port->id), + SYS_LDB_PP2VAS_RST); + + DLB_CSR_WR(hw, + CHP_LDB_CQ2VAS(port->id), + CHP_LDB_CQ2VAS_RST); + + DLB_CSR_WR(hw, + SYS_LDB_PP2VDEV(port->id), + SYS_LDB_PP2VDEV_RST); + + DLB_CSR_WR(hw, + SYS_LDB_PP_V(port->id), + SYS_LDB_PP_V_RST); + + DLB_CSR_WR(hw, + LSP_CQ_LDB_DSBL(port->id), + LSP_CQ_LDB_DSBL_RST); + + DLB_CSR_WR(hw, + CHP_LDB_CQ_DEPTH(port->id), + CHP_LDB_CQ_DEPTH_RST); + + DLB_CSR_WR(hw, + LSP_CQ_LDB_INFL_LIM(port->id), + LSP_CQ_LDB_INFL_LIM_RST); + + DLB_CSR_WR(hw, + CHP_HIST_LIST_LIM(port->id), + CHP_HIST_LIST_LIM_RST); + + DLB_CSR_WR(hw, + CHP_HIST_LIST_BASE(port->id), + CHP_HIST_LIST_BASE_RST); + + DLB_CSR_WR(hw, + CHP_HIST_LIST_POP_PTR(port->id), + CHP_HIST_LIST_POP_PTR_RST); + + DLB_CSR_WR(hw, + CHP_HIST_LIST_PUSH_PTR(port->id), + CHP_HIST_LIST_PUSH_PTR_RST); + + DLB_CSR_WR(hw, + CHP_LDB_CQ_INT_DEPTH_THRSH(port->id), + CHP_LDB_CQ_INT_DEPTH_THRSH_RST); + + DLB_CSR_WR(hw, + CHP_LDB_CQ_TMR_THRSH(port->id), + CHP_LDB_CQ_TMR_THRSH_RST); + + DLB_CSR_WR(hw, + CHP_LDB_CQ_INT_ENB(port->id), + CHP_LDB_CQ_INT_ENB_RST); + + DLB_CSR_WR(hw, + SYS_LDB_CQ_ISR(port->id), + SYS_LDB_CQ_ISR_RST); + + DLB_CSR_WR(hw, + LSP_CQ_LDB_TKN_DEPTH_SEL(port->id), + LSP_CQ_LDB_TKN_DEPTH_SEL_RST); + + DLB_CSR_WR(hw, + CHP_LDB_CQ_TKN_DEPTH_SEL(port->id), + CHP_LDB_CQ_TKN_DEPTH_SEL_RST); + + DLB_CSR_WR(hw, + CHP_LDB_CQ_WPTR(port->id), + CHP_LDB_CQ_WPTR_RST); + + DLB_CSR_WR(hw, + LSP_CQ_LDB_TKN_CNT(port->id), + LSP_CQ_LDB_TKN_CNT_RST); + + DLB_CSR_WR(hw, + SYS_LDB_CQ_ADDR_L(port->id), + SYS_LDB_CQ_ADDR_L_RST); + + DLB_CSR_WR(hw, + SYS_LDB_CQ_ADDR_U(port->id), + SYS_LDB_CQ_ADDR_U_RST); + + DLB_CSR_WR(hw, + SYS_LDB_CQ_AT(port->id), + SYS_LDB_CQ_AT_RST); + + DLB_CSR_WR(hw, + SYS_LDB_CQ_PASID(port->id), + SYS_LDB_CQ_PASID_RST); + + DLB_CSR_WR(hw, + SYS_LDB_CQ2VF_PF_RO(port->id), + SYS_LDB_CQ2VF_PF_RO_RST); + + DLB_CSR_WR(hw, + LSP_CQ_LDB_TOT_SCH_CNTL(port->id), + LSP_CQ_LDB_TOT_SCH_CNTL_RST); + + DLB_CSR_WR(hw, + LSP_CQ_LDB_TOT_SCH_CNTH(port->id), + LSP_CQ_LDB_TOT_SCH_CNTH_RST); + + DLB_CSR_WR(hw, + LSP_CQ2QID0(port->id), + LSP_CQ2QID0_RST); + + DLB_CSR_WR(hw, + LSP_CQ2QID1(port->id), + LSP_CQ2QID1_RST); + + DLB_CSR_WR(hw, + LSP_CQ2PRIOV(port->id), + LSP_CQ2PRIOV_RST); +} + +static void dlb_domain_reset_ldb_port_registers(struct dlb_hw *hw, + struct dlb_hw_domain *domain) +{ + struct dlb_ldb_port *port; + int i; + + for (i = 0; i < DLB_NUM_COS_DOMAINS; i++) { + list_for_each_entry(port, &domain->used_ldb_ports[i], domain_list) + __dlb_domain_reset_ldb_port_registers(hw, port); + } +} + +static void +__dlb_domain_reset_dir_port_registers(struct dlb_hw *hw, + struct dlb_dir_pq_pair *port) +{ + DLB_CSR_WR(hw, + CHP_DIR_CQ2VAS(port->id), + CHP_DIR_CQ2VAS_RST); + + DLB_CSR_WR(hw, + LSP_CQ_DIR_DSBL(port->id), + LSP_CQ_DIR_DSBL_RST); + + DLB_CSR_WR(hw, SYS_DIR_CQ_OPT_CLR, port->id); + + DLB_CSR_WR(hw, + CHP_DIR_CQ_DEPTH(port->id), + CHP_DIR_CQ_DEPTH_RST); + + DLB_CSR_WR(hw, + CHP_DIR_CQ_INT_DEPTH_THRSH(port->id), + CHP_DIR_CQ_INT_DEPTH_THRSH_RST); + + DLB_CSR_WR(hw, + CHP_DIR_CQ_TMR_THRSH(port->id), + CHP_DIR_CQ_TMR_THRSH_RST); + + DLB_CSR_WR(hw, + CHP_DIR_CQ_INT_ENB(port->id), + CHP_DIR_CQ_INT_ENB_RST); + + DLB_CSR_WR(hw, + SYS_DIR_CQ_ISR(port->id), + SYS_DIR_CQ_ISR_RST); + + DLB_CSR_WR(hw, + LSP_CQ_DIR_TKN_DEPTH_SEL_DSI(port->id), + LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RST); + + DLB_CSR_WR(hw, + CHP_DIR_CQ_TKN_DEPTH_SEL(port->id), + CHP_DIR_CQ_TKN_DEPTH_SEL_RST); + + DLB_CSR_WR(hw, + CHP_DIR_CQ_WPTR(port->id), + CHP_DIR_CQ_WPTR_RST); + + DLB_CSR_WR(hw, + LSP_CQ_DIR_TKN_CNT(port->id), + LSP_CQ_DIR_TKN_CNT_RST); + + DLB_CSR_WR(hw, + SYS_DIR_CQ_ADDR_L(port->id), + SYS_DIR_CQ_ADDR_L_RST); + + DLB_CSR_WR(hw, + SYS_DIR_CQ_ADDR_U(port->id), + SYS_DIR_CQ_ADDR_U_RST); + + DLB_CSR_WR(hw, + SYS_DIR_CQ_AT(port->id), + SYS_DIR_CQ_AT_RST); + + DLB_CSR_WR(hw, + SYS_DIR_CQ_PASID(port->id), + SYS_DIR_CQ_PASID_RST); + + DLB_CSR_WR(hw, + SYS_DIR_CQ_FMT(port->id), + SYS_DIR_CQ_FMT_RST); + + DLB_CSR_WR(hw, + SYS_DIR_CQ2VF_PF_RO(port->id), + SYS_DIR_CQ2VF_PF_RO_RST); + + DLB_CSR_WR(hw, + LSP_CQ_DIR_TOT_SCH_CNTL(port->id), + LSP_CQ_DIR_TOT_SCH_CNTL_RST); + + DLB_CSR_WR(hw, + LSP_CQ_DIR_TOT_SCH_CNTH(port->id), + LSP_CQ_DIR_TOT_SCH_CNTH_RST); + + DLB_CSR_WR(hw, + SYS_DIR_PP2VAS(port->id), + SYS_DIR_PP2VAS_RST); + + DLB_CSR_WR(hw, + CHP_DIR_CQ2VAS(port->id), + CHP_DIR_CQ2VAS_RST); + + DLB_CSR_WR(hw, + SYS_DIR_PP2VDEV(port->id), + SYS_DIR_PP2VDEV_RST); + + DLB_CSR_WR(hw, + SYS_DIR_PP_V(port->id), + SYS_DIR_PP_V_RST); +} + +static void dlb_domain_reset_dir_port_registers(struct dlb_hw *hw, + struct dlb_hw_domain *domain) +{ + struct dlb_dir_pq_pair *port; + + list_for_each_entry(port, &domain->used_dir_pq_pairs, domain_list) + __dlb_domain_reset_dir_port_registers(hw, port); +} + +static void dlb_domain_reset_ldb_queue_registers(struct dlb_hw *hw, + struct dlb_hw_domain *domain) +{ + struct dlb_ldb_queue *queue; + + list_for_each_entry(queue, &domain->used_ldb_queues, domain_list) { + unsigned int queue_id = queue->id; + int i; + + DLB_CSR_WR(hw, + LSP_QID_NALDB_TOT_ENQ_CNTL(queue_id), + LSP_QID_NALDB_TOT_ENQ_CNTL_RST); + + DLB_CSR_WR(hw, + LSP_QID_NALDB_TOT_ENQ_CNTH(queue_id), + LSP_QID_NALDB_TOT_ENQ_CNTH_RST); + + DLB_CSR_WR(hw, + LSP_QID_ATM_TOT_ENQ_CNTL(queue_id), + LSP_QID_ATM_TOT_ENQ_CNTL_RST); + + DLB_CSR_WR(hw, + LSP_QID_ATM_TOT_ENQ_CNTH(queue_id), + LSP_QID_ATM_TOT_ENQ_CNTH_RST); + + DLB_CSR_WR(hw, + LSP_QID_NALDB_MAX_DEPTH(queue_id), + LSP_QID_NALDB_MAX_DEPTH_RST); + + DLB_CSR_WR(hw, + LSP_QID_LDB_INFL_LIM(queue_id), + LSP_QID_LDB_INFL_LIM_RST); + + DLB_CSR_WR(hw, + LSP_QID_AQED_ACTIVE_LIM(queue_id), + LSP_QID_AQED_ACTIVE_LIM_RST); + + DLB_CSR_WR(hw, + LSP_QID_ATM_DEPTH_THRSH(queue_id), + LSP_QID_ATM_DEPTH_THRSH_RST); + + DLB_CSR_WR(hw, + LSP_QID_NALDB_DEPTH_THRSH(queue_id), + LSP_QID_NALDB_DEPTH_THRSH_RST); + + DLB_CSR_WR(hw, + SYS_LDB_QID_ITS(queue_id), + SYS_LDB_QID_ITS_RST); + + DLB_CSR_WR(hw, + CHP_ORD_QID_SN(queue_id), + CHP_ORD_QID_SN_RST); + + DLB_CSR_WR(hw, + CHP_ORD_QID_SN_MAP(queue_id), + CHP_ORD_QID_SN_MAP_RST); + + DLB_CSR_WR(hw, + SYS_LDB_QID_V(queue_id), + SYS_LDB_QID_V_RST); + + DLB_CSR_WR(hw, + SYS_LDB_QID_CFG_V(queue_id), + SYS_LDB_QID_CFG_V_RST); + + if (queue->sn_cfg_valid) { + u32 offs[2]; + + offs[0] = RO_GRP_0_SLT_SHFT(queue->sn_slot); + offs[1] = RO_GRP_1_SLT_SHFT(queue->sn_slot); + + DLB_CSR_WR(hw, + offs[queue->sn_group], + RO_GRP_0_SLT_SHFT_RST); + } + + for (i = 0; i < LSP_QID2CQIDIX_NUM; i++) { + DLB_CSR_WR(hw, + LSP_QID2CQIDIX(queue_id, i), + LSP_QID2CQIDIX_00_RST); + + DLB_CSR_WR(hw, + LSP_QID2CQIDIX2(queue_id, i), + LSP_QID2CQIDIX2_00_RST); + + DLB_CSR_WR(hw, + ATM_QID2CQIDIX(queue_id, i), + ATM_QID2CQIDIX_00_RST); + } + } +} + +static void dlb_domain_reset_dir_queue_registers(struct dlb_hw *hw, + struct dlb_hw_domain *domain) +{ + struct dlb_dir_pq_pair *queue; + + list_for_each_entry(queue, &domain->used_dir_pq_pairs, domain_list) { + DLB_CSR_WR(hw, + LSP_QID_DIR_MAX_DEPTH(queue->id), + LSP_QID_DIR_MAX_DEPTH_RST); + + DLB_CSR_WR(hw, + LSP_QID_DIR_TOT_ENQ_CNTL(queue->id), + LSP_QID_DIR_TOT_ENQ_CNTL_RST); + + DLB_CSR_WR(hw, + LSP_QID_DIR_TOT_ENQ_CNTH(queue->id), + LSP_QID_DIR_TOT_ENQ_CNTH_RST); + + DLB_CSR_WR(hw, + LSP_QID_DIR_DEPTH_THRSH(queue->id), + LSP_QID_DIR_DEPTH_THRSH_RST); + + DLB_CSR_WR(hw, + SYS_DIR_QID_ITS(queue->id), + SYS_DIR_QID_ITS_RST); + + DLB_CSR_WR(hw, + SYS_DIR_QID_V(queue->id), + SYS_DIR_QID_V_RST); + } +} + +static void dlb_domain_reset_registers(struct dlb_hw *hw, + struct dlb_hw_domain *domain) +{ + dlb_domain_reset_ldb_port_registers(hw, domain); + + dlb_domain_reset_dir_port_registers(hw, domain); + + dlb_domain_reset_ldb_queue_registers(hw, domain); + + dlb_domain_reset_dir_queue_registers(hw, domain); + + DLB_CSR_WR(hw, + CHP_CFG_LDB_VAS_CRD(domain->id), + CHP_CFG_LDB_VAS_CRD_RST); + + DLB_CSR_WR(hw, + CHP_CFG_DIR_VAS_CRD(domain->id), + CHP_CFG_DIR_VAS_CRD_RST); +} + static void dlb_log_reset_domain(struct dlb_hw *hw, u32 domain_id) { dev_dbg(hw_to_dev(hw), "DLB reset domain:\n"); @@ -927,6 +1311,9 @@ int dlb_reset_domain(struct dlb_hw *hw, u32 domain_id) if (!domain || !domain->configured) return -EINVAL; + /* Reset the QID and port state. */ + dlb_domain_reset_registers(hw, domain); + return dlb_domain_reset_software_state(hw, domain); } -- 2.27.0