MIME-Version: 1.0
References: <20211217121148.6753-1-sam.shih@mediatek.com> <20211217121148.6753-4-sam.shih@mediatek.com>
 <4b3cbf50198c5f57101135ffc44fa95bfda55139.camel@mediatek.com>
In-Reply-To: <4b3cbf50198c5f57101135ffc44fa95bfda55139.camel@mediatek.com>
From:   Ryder Lee <ryder.lee@kernel.org>
Date:   Mon, 20 Dec 2021 23:13:58 -0800
Message-ID: <CA+SzRW4smu8bX_iky-yeU3viC6SyNthiWR=APJL17FHeVVzTAQ@mail.gmail.com>
Subject: Re: [PATCH v7 3/3] clk: mediatek: add mt7986 clock support
To:     Sam Shih <sam.shih@mediatek.com>, Rob Herring <robh+dt@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Chun-Jie Chen <chun-jie.chen@mediatek.com>,
        Ikjoon Jang <ikjn@chromium.org>,
        Miles Chen <miles.chen@mediatek.com>,
        Enric Balletbo i Serra <enric.balletbo@collabora.com>,
        Chen-Yu Tsai <wenst@chromium.org>, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org
Cc:     John Crispin <john@phrozen.org>,
        Ryder Lee <Ryder.Lee@mediatek.com>,
        YH Chen <yh.chen@mediatek.com>
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

> On Fri, 2021-12-17 at 20:11 +0800, Sam Shih wrote:
> > Add MT7986 clock support, include topckgen, apmixedsys,
> > infracfg, and ethernet subsystem clocks.
> >
> > Signed-off-by: Sam Shih <sam.shih@mediatek.com>
> > ---
> > v7: exclude DTS changes in the patch series
> > v5: used builtin_platform_driver instead of CLK_OF_DECLARE
> >     follow recent clk-mt8195 clock patch series:
> >
> > https://lore.kernel.org/linux-arm-kernel/20210914021633.26377-1-chun-jie.chen@mediatek.com/
> >
> > v4: separate clock part into a single patch series
> >
> > Original thread:
> >
> https://lore.kernel.org/lkml/20210914085137.31761-4-sam.shih@mediatek.com/
> >
> > v2: applied the comment suggested by reviewers:
> >     - splited basic clock driver to apmixed, topckgen, and infracfg
> >     - removed 1:1 factor clock
> >     - renamed factor clock for easier to understand
> > ---
> >  drivers/clk/mediatek/Kconfig               |  17 +
> >  drivers/clk/mediatek/Makefile              |   4 +
> >  drivers/clk/mediatek/clk-mt7986-apmixed.c  | 100 ++++++
> >  drivers/clk/mediatek/clk-mt7986-eth.c      | 132 ++++++++
> >  drivers/clk/mediatek/clk-mt7986-infracfg.c | 224 ++++++++++++++
> >  drivers/clk/mediatek/clk-mt7986-topckgen.c | 342
> > +++++++++++++++++++++
> >  6 files changed, 819 insertions(+)
> >  create mode 100644 drivers/clk/mediatek/clk-mt7986-apmixed.c
> >  create mode 100644 drivers/clk/mediatek/clk-mt7986-eth.c
> >  create mode 100644 drivers/clk/mediatek/clk-mt7986-infracfg.c
> >  create mode 100644 drivers/clk/mediatek/clk-mt7986-topckgen.c
> >
> > diff --git a/drivers/clk/mediatek/Kconfig
> > b/drivers/clk/mediatek/Kconfig
> > index 3ce6fb04d8ff..dd546d34d5e8 100644
> > --- a/drivers/clk/mediatek/Kconfig
> > +++ b/drivers/clk/mediatek/Kconfig
> > @@ -344,6 +344,23 @@ config COMMON_CLK_MT7629_HIFSYS
> >         This driver supports MediaTek MT7629 HIFSYS clocks providing
> >         to PCI-E and USB.
> >
> > +config COMMON_CLK_MT7986
> > +     bool "Clock driver for MediaTek MT7986"
> > +     depends on ARCH_MEDIATEK || COMPILE_TEST
> > +     select COMMON_CLK_MEDIATEK
> > +     default ARCH_MEDIATEK
> > +     help
> > +       This driver supports MediaTek MT7986 basic clocks and clocks
> > +       required for various periperals found on MediaTek.

s/periperals/peripherals/

> > +config COMMON_CLK_MT7986_ETHSYS
> > +     bool "Clock driver for MediaTek MT7986 ETHSYS"
> > +     depends on COMMON_CLK_MT7986
> > +     default COMMON_CLK_MT7986
> > +     help
> > +       This driver add support for clocks for Ethernet and SGMII
> > +       required on MediaTek MT7986 SoC.

s/add/adds/

With that said, you can add my tag:
Reviewed-by: Ryder Lee <ryder.lee@kernel.org>