From:   Johan Jonker <jbx6244@gmail.com>
To:     heiko@sntech.de
Cc:     robh+dt@kernel.org, kishon@ti.com, vkoul@kernel.org,
        p.zabel@pengutronix.de, lee.jones@linaro.org,
        yifeng.zhao@rock-chips.com, kever.yang@rock-chips.com,
        cl@rock-chips.com, linux-phy@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org,
        linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: [RFC PATCH v6 0/4] Add Naneng multi phy support for rk3568
Date:   Wed, 22 Dec 2021 22:30:28 +0100
Message-Id: <20211222213032.7678-1-jbx6244@gmail.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

=============================================

TEST COMPILED ONLY!
Driver not verified with hardware!
Produced in the hope that we can get some review progress
with this serie for the documents and driver.
Use at your own risk!

Renamed the combi phy driver to multi phy to highlight the different approach and
not to confuse with the driver from the Rockchip manufacturer tree.
By using a parent node it makes it hopefully easier to coordinate
for new futures/functions between nodes.

Removed a few properties, because it's not entire clear how they should be used.
To prevent the obligation to keep supporting them despite changed handling.

=============================================

Changes in v6:
- restyle
- rename defines
- change from comb to multi phy
- clean up includes
- add parent node
- change compatible strings
- remove rockchip,sgmii-mac-sel support
- remove rockchip,dis-u3otg0-port support
- remove rockchip,dis-u3otg1-port support

Changes in v5:
- modify description for ssc and ext-refclk
- remove apb reset
- add rockchip_combphy_updatel()
- restyle

Changes in v4:
- restyle
- remove some minItems
- add more properties
- remove reset-names
- move #phy-cells
- add rockchip,rk3568-pipe-grf
- add rockchip,rk3568-pipe-phy-grf
- add devm_reset_control_array_get()
- remove clk structure
- change refclk DT parse
- change dev_err message
- add dot to phrase
- add ext_refclk variable
- add enable_ssc variable
- rename rockchip_combphy_param_write
- remove param_read
- replace rockchip-naneng-combphy driver name
- rename node name

Changes in v3:
- Using api devm_reset_control_get_optional_exclusive and dev_err_probe.
- Remove apb_rst.
- Redefine registers address.
- Move pipe_phy_grf0 to rk3568.dtsi

Changes in v2:
- Fix dtschema/dtc warnings/errors
- Using api devm_platform_get_and_ioremap_resource.
- Modify rockchip_combphy_set_Mode.
- Add some PHY registers definition.
- Move phy0 to rk3568.dtsi

Johan Jonker (1):
  dt-bindings: mfd: syscon: add naneng multi phy register compatible

Yifeng Zhao (3):
  dt-bindings: phy: rockchip: add naneng multi phy bindings
  phy: rockchip: add naneng multi phy for rk3568
  arm64: dts: rockchip: add naneng multi phy nodes for rk3568

 .../devicetree/bindings/mfd/syscon.yaml       |   2 +
 .../phy/phy-rockchip-naneng-multiphy.yaml     | 167 +++++
 arch/arm64/boot/dts/rockchip/rk3566.dtsi      |   4 +
 arch/arm64/boot/dts/rockchip/rk3568.dtsi      |  23 +
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      |  50 ++
 drivers/phy/rockchip/Kconfig                  |   8 +
 drivers/phy/rockchip/Makefile                 |   1 +
 .../rockchip/phy-rockchip-naneng-multiphy.c   | 661 ++++++++++++++++++
 8 files changed, 916 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-naneng-multiphy.yaml
 create mode 100644 drivers/phy/rockchip/phy-rockchip-naneng-multiphy.c

-- 
2.20.1