Message-ID: <7b64d1c3-f798-d64b-9ee3-9669d98f4e28@opensource.wdc.com>
Date:   Fri, 31 Dec 2021 09:52:04 +0900
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Subject: Re: [PATCH v3 3/3] ahci: AMD A85 FCH (Hudson D4): Skip 200 ms
 debounce delay in `sata_link_resume()`
Content-Language: en-US
To:     Paul Menzel <pmenzel@molgen.mpg.de>
Cc:     linux-ide@vger.kernel.org,
        Dmitry Torokhov <dmitry.torokhov@gmail.com>,
        Guenter Roeck <groeck@chromium.org>,
        linux-kernel@vger.kernel.org
References: <20211229161119.1006-1-pmenzel@molgen.mpg.de>
 <20211229161119.1006-3-pmenzel@molgen.mpg.de>
 <5c333718-eaa5-b41c-e8ea-59d6e01254aa@opensource.wdc.com>
 <19f6cd93-9bd7-60dc-4471-18022bcf456c@molgen.mpg.de>
From:   Damien Le Moal <damien.lemoal@opensource.wdc.com>
Organization: Western Digital Research
In-Reply-To: <19f6cd93-9bd7-60dc-4471-18022bcf456c@molgen.mpg.de>
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Precedence: bulk

On 12/30/21 20:08, Paul Menzel wrote:
>>>   	board_ahci_nomsi,
>>>   	board_ahci_noncq,
>>>   	board_ahci_nosntf,
>>> @@ -141,6 +142,13 @@ static const struct ata_port_info ahci_port_info[] = {
>>>   		.udma_mask	= ATA_UDMA6,
>>>   		.port_ops	= &ahci_ops,
>>>   	},
>>> +	[board_ahci_nodbdelay] = {
>>> +		.flags		= AHCI_FLAG_COMMON,
>>> +		.link_flags	= ATA_LFLAG_NO_DB_DELAY,
>>> +		.pio_mask	= ATA_PIO4,
>>> +		.udma_mask	= ATA_UDMA6,
>>> +		.port_ops	= &ahci_ops,
>>> +	},
>>>   	[board_ahci_nomsi] = {
>>>   		AHCI_HFLAGS	(AHCI_HFLAG_NO_MSI),
>>>   		.flags		= AHCI_FLAG_COMMON,
>>> @@ -437,6 +445,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
>>>   		board_ahci_al },
>>>   	/* AMD */
>>>   	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE), board_ahci },
>>> +	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_AHCI), board_ahci_nodbdelay },
>>
>> Patch 1 introduces this macro in pci_ids.h, but it is used only here. So
>> to keep with the current style in this structure, drop the macro (so
>> drop patch 1).
> 
> I wait for your answer of the second patch, and then I am going to sent v4.

Let's use the numeric value. No macro definition needed.

> 
>>>   	{ PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
>>>   	{ PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */
>>>   	/* AMD is using RAID class only for ahci controllers */
> 
> Do you have a AHCI device at hand, where you could also test if 
> everything works fine without the delay?

Unfortunately, I do not have any board with this adapter.

Cheers.


-- 
Damien Le Moal
Western Digital Research