Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CF5BC433F5 for ; Tue, 4 Jan 2022 04:57:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232905AbiADEzY (ORCPT ); Mon, 3 Jan 2022 23:55:24 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:43930 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231536AbiADEzX (ORCPT ); Mon, 3 Jan 2022 23:55:23 -0500 X-UUID: b3df56c9e49644eb80781541af80aa7a-20220104 X-UUID: b3df56c9e49644eb80781541af80aa7a-20220104 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 512780051; Tue, 04 Jan 2022 12:55:18 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 4 Jan 2022 12:55:16 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 4 Jan 2022 12:55:17 +0800 From: Sam Shih To: Rob Herring , Michael Turquette , Stephen Boyd , Matthias Brugger , Chun-Jie Chen , Weiyi Lu , Ikjoon Jang , Miles Chen , Enric Balletbo i Serra , Chen-Yu Tsai , Ryder Lee , , , , , CC: John Crispin , Sam Shih Subject: [PATCH v8 0/3] Mediatek MT7986 basic clock support Date: Tue, 4 Jan 2022 12:55:08 +0800 Message-ID: <20220104045508.21614-1-sam.shih@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series add basic clock support for mediatek mt7986 SoC. It is based on patch series "Add basic SoC support for mediatek mt7986" https://lore.kernel.org/all/20211018114009.13350-1-sam.shih@mediatek.com/ that has been merged into matthias's tree recently: https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/log/?h=v5.16-next/dts64 --- v8: update the git message, and add a Reviewed-by tag for this series v7: exclude DTS changes in the patch series v5: used builtin_platform_driver instead of CLK_OF_DECLARE follow recent clk-mt8195 clock patch series: https://lore.kernel.org/linux-arm-kernel/20210914021633.26377-1-chun-jie.chen@mediatek.com/ v4: According to the maintainer¡¦s suggestion, this patch splits the previous thread into independent patch series. This patch include clock driver and device tree update Original thread: https://lore.kernel.org/all/20210914085137.31761-1-sam.shih@mediatek.com/ https://lore.kernel.org/linux-arm-kernel/20210914085137.31761-2-sam.shih@mediatek.com/ --- Sam Shih (3): dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC clk: mediatek: add mt7986 clock IDs clk: mediatek: add mt7986 clock support .../arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,ethsys.txt | 1 + .../arm/mediatek/mediatek,infracfg.txt | 1 + .../arm/mediatek/mediatek,sgmiisys.txt | 2 + .../arm/mediatek/mediatek,topckgen.txt | 1 + drivers/clk/mediatek/Kconfig | 17 + drivers/clk/mediatek/Makefile | 4 + drivers/clk/mediatek/clk-mt7986-apmixed.c | 100 +++++ drivers/clk/mediatek/clk-mt7986-eth.c | 132 +++++++ drivers/clk/mediatek/clk-mt7986-infracfg.c | 224 ++++++++++++ drivers/clk/mediatek/clk-mt7986-topckgen.c | 342 ++++++++++++++++++ include/dt-bindings/clock/mt7986-clk.h | 169 +++++++++ 12 files changed, 994 insertions(+) create mode 100644 drivers/clk/mediatek/clk-mt7986-apmixed.c create mode 100644 drivers/clk/mediatek/clk-mt7986-eth.c create mode 100644 drivers/clk/mediatek/clk-mt7986-infracfg.c create mode 100644 drivers/clk/mediatek/clk-mt7986-topckgen.c create mode 100644 include/dt-bindings/clock/mt7986-clk.h -- 2.29.2