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In-Reply-To: <20211218211157.188214-2-avolmat@me.com>
References: <20211218211157.188214-1-avolmat@me.com> <20211218211157.188214-2-avolmat@me.com>
Subject: Re: [PATCH v2 1/2] clk: st: clkgen-fsyn: search reg within node or parent
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Lee Jones <lee.jones@linaro.org>, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, Alain Volmat <avolmat@me.com>
To:     Alain Volmat <avolmat@me.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Patrice Chotard <patrice.chotard@foss.st.com>,
        Rob Herring <robh+dt@kernel.org>
Date:   Wed, 05 Jan 2022 17:21:58 -0800
User-Agent: alot/0.9.1
Message-Id: <20220106012159.6418EC36AE3@smtp.kernel.org>
Precedence: bulk

Quoting Alain Volmat (2021-12-18 13:11:56)
> In order to avoid having duplicated addresses within the DT,
> only have one unit-address per clockgen and each driver within
> the clockgen should look at the parent node (overall clockgen)
> to figure out the reg property.  Such behavior is already in
> place in other STi platform clock drivers such as clk-flexgen
> and clkgen-pll.  Keep backward compatibility by first looking
> at reg within the node before looking into the parent node.
>=20
> Signed-off-by: Alain Volmat <avolmat@me.com>
> ---

Applied to clk-next