Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E5C55C433F5 for ; Thu, 6 Jan 2022 08:12:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236467AbiAFIMw convert rfc822-to-8bit (ORCPT ); Thu, 6 Jan 2022 03:12:52 -0500 Received: from relay5-d.mail.gandi.net ([217.70.183.197]:59003 "EHLO relay5-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236295AbiAFIMu (ORCPT ); Thu, 6 Jan 2022 03:12:50 -0500 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay5-d.mail.gandi.net (Postfix) with ESMTPSA id A79E61C0006; Thu, 6 Jan 2022 08:12:47 +0000 (UTC) Date: Thu, 6 Jan 2022 09:12:46 +0100 From: Miquel Raynal To: Liang Yang Cc: Vignesh Raghavendra , , Richard Weinberger , Jerome Brunet , Neil Armstrong , Martin Blumenstingl , Kevin Hilman , Jianxin Pan , Victor Wan , XianWei Zhao , Kelvin Zhang , BiChao Zheng , YongHui Yu , , , , Subject: Re: [PATCH] dt-bindings: nand: meson: fix controller clock Message-ID: <20220106091246.08ca66e0@xps13> In-Reply-To: <20220106033130.37623-1-liang.yang@amlogic.com> References: <20220106033130.37623-1-liang.yang@amlogic.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org liang.yang@amlogic.com wrote on Thu, 6 Jan 2022 11:31:30 +0800: > Change-Id: I1425b491d8b95061e1ce358ef33143433fc94d24 > --- > .../bindings/mtd/amlogic,meson-nand.txt | 18 +++--------------- I forgot to mention, while you're at it, after fixing the bindings, could you please convert it to yaml? > 1 file changed, 3 insertions(+), 15 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt > index 5794ab1147c1..37f16fe4fe66 100644 > --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt > +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt > @@ -14,11 +14,6 @@ Required properties: > - clock-names: Should contain the following: > "core" - NFC module gate clock > "device" - device clock from eMMC sub clock controller > - "rx" - rx clock phase > - "tx" - tx clock phase > - > -- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC > - controller port C > > Optional children nodes: > Children nodes represent the available nand chips. > @@ -28,11 +23,6 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi > > Example demonstrate on AXG SoC: > > - sd_emmc_c_clkc: mmc@7000 { > - compatible = "amlogic,meson-axg-mmc-clkc", "syscon"; > - reg = <0x0 0x7000 0x0 0x800>; > - }; > - > nand-controller@7800 { > compatible = "amlogic,meson-axg-nfc"; > reg = <0x0 0x7800 0x0 0x100>; > @@ -41,11 +31,9 @@ Example demonstrate on AXG SoC: > interrupts = ; > > clocks = <&clkc CLKID_SD_EMMC_C>, > - <&sd_emmc_c_clkc CLKID_MMC_DIV>, > - <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>, > - <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>; > - clock-names = "core", "device", "rx", "tx"; > - amlogic,mmc-syscon = <&sd_emmc_c_clkc>; > + <&clkc CLKID_FCLK_DIV2>; > + clock-names = "core", "device"; > + sd_emmc_c_clkc = <0xffe07000>; > > pinctrl-names = "default"; > pinctrl-0 = <&nand_pins>; Thanks, Miquèl