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([2001:861:44c0:66c0:cf72:3b19:5d45:871d]) by smtp.gmail.com with ESMTPSA id y8sm1472208wrd.10.2022.01.06.00.19.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Jan 2022 00:19:10 -0800 (PST) Subject: Re: [PATCH] dt-bindings: nand: meson: fix controller clock To: Liang Yang , Miquel Raynal , Vignesh Raghavendra , linux-mtd@lists.infradead.org Cc: Richard Weinberger , Jerome Brunet , Martin Blumenstingl , Kevin Hilman , Jianxin Pan , Victor Wan , XianWei Zhao , Kelvin Zhang , BiChao Zheng , YongHui Yu , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20220106033130.37623-1-liang.yang@amlogic.com> From: Neil Armstrong Organization: Baylibre Message-ID: <8439ec98-694e-0391-2a00-89e856024823@baylibre.com> Date: Thu, 6 Jan 2022 09:19:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20220106033130.37623-1-liang.yang@amlogic.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 06/01/2022 04:31, Liang Yang wrote: > Change-Id: I1425b491d8b95061e1ce358ef33143433fc94d24 > --- > .../bindings/mtd/amlogic,meson-nand.txt | 18 +++--------------- > 1 file changed, 3 insertions(+), 15 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt > index 5794ab1147c1..37f16fe4fe66 100644 > --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt > +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt > @@ -14,11 +14,6 @@ Required properties: > - clock-names: Should contain the following: > "core" - NFC module gate clock > "device" - device clock from eMMC sub clock controller > - "rx" - rx clock phase > - "tx" - tx clock phase > - > -- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC > - controller port C > > Optional children nodes: > Children nodes represent the available nand chips. > @@ -28,11 +23,6 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi > > Example demonstrate on AXG SoC: > > - sd_emmc_c_clkc: mmc@7000 { > - compatible = "amlogic,meson-axg-mmc-clkc", "syscon"; > - reg = <0x0 0x7000 0x0 0x800>; > - }; > - > nand-controller@7800 { > compatible = "amlogic,meson-axg-nfc"; > reg = <0x0 0x7800 0x0 0x100>; > @@ -41,11 +31,9 @@ Example demonstrate on AXG SoC: > interrupts = ; > > clocks = <&clkc CLKID_SD_EMMC_C>, > - <&sd_emmc_c_clkc CLKID_MMC_DIV>, > - <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>, > - <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>; > - clock-names = "core", "device", "rx", "tx"; > - amlogic,mmc-syscon = <&sd_emmc_c_clkc>; > + <&clkc CLKID_FCLK_DIV2>; > + clock-names = "core", "device"; > + sd_emmc_c_clkc = <0xffe07000>; sd_emmc_c_clkc should be documented, but it should be either: - a syscon - in reg but since 0xffe07000 is part of the emmc memory space, you can't simply put this address like that and pass it to a random undocumented property. Adding "syscon" to the sd_emmc_c compatibles, and passing the sd_emmc_c node as syscon could actually work. Neil > > pinctrl-names = "default"; > pinctrl-0 = <&nand_pins>; >