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David Alan Gilbert" , tony.luck@intel.com, marcorr@google.com, sathyanarayanan.kuppuswamy@linux.intel.com Subject: Re: [PATCH v8 22/40] x86/sev: move MSR-based VMGEXITs for CPUID to helper Message-ID: References: <20211210154332.11526-1-brijesh.singh@amd.com> <20211210154332.11526-23-brijesh.singh@amd.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20211210154332.11526-23-brijesh.singh@amd.com> X-ClientProxiedBy: SA0PR11CA0123.namprd11.prod.outlook.com (2603:10b6:806:131::8) To SN6PR10MB2576.namprd10.prod.outlook.com (2603:10b6:805:44::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7573b924-5b79-4afe-9503-08d9d143c5d9 X-MS-TrafficTypeDiagnostic: SN6PR10MB2990:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: v8RgcNBVrwDZs7s8mTcMptNwf9/3gAVBlGh3xeBcsIQBsTc/Da3b9EZMgkFNBV+NUVQQu2VH1jG7SxjprehJ8U9TP3Ii8PtYnDulAyRZmqE7k56/T9xp+A3xFtB+v+RRZL86git8TRocLoQpzGYHCQHOynVesCq1OAQpJCK+VsJ4ksWYFVMorl2GjYLoVqvn6t1xMultJo6seSmxVHocXfx7zpJwtorXbefJof1Rd5aYSrubNeT6i+zXczLxQU5SADGXHLRk2v8naQXqq9k3wSZxeevqZ4jrAdquyU3WO51rnScEUa2WYWJxpQH72uMcUMbZM2qticd91y/sosC3XFPStSS/5DEi8DUSUzAwMyO5cICVUcnB3OTMPsZTQMRB1O0VD4Ru/0OWNEpEnipEyuBnPt9otxZeh/8P+NSNEvNSBQAxggguAXaOjvECZNJI+nGMUjMHZKqp49O1eXhbffgXe8V//NPvEuv0V9eK+9zwI/uLO+GWts78Gk6dRIb4dLe+52olDMkjmrtS0c38HOp6tkqvY978orCKlFhK3w8nsurdu8Tjbfdtkrbc2S5qPCIgtkboxdy/oDTF6VmXwf2mkuNQDa3g6qjxxzvdPiv20h3ccfrnA80U43p1m0VbPKQAjdlsA24EPxYXkjp8Dg== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SN6PR10MB2576.namprd10.prod.outlook.com;PTR:;CAT:NONE;SFS:(7916004)(366004)(54906003)(44832011)(66556008)(2906002)(7416002)(7406005)(508600001)(6916009)(83380400001)(66946007)(5660300002)(4001150100001)(8676002)(66476007)(86362001)(26005)(186003)(33716001)(38100700002)(6486002)(9686003)(6512007)(4326008)(316002)(8936002)(6666004)(6506007)(53546011);DIR:OUT;SFP:1101; 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> } > > +static int sev_cpuid_hv(u32 func, u32 subfunc, u32 *eax, u32 *ebx, > + u32 *ecx, u32 *edx) > +{ > + u64 val; > + > + if (eax) { > + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(func, GHCB_CPUID_REQ_EAX)); > + VMGEXIT(); > + val = sev_es_rd_ghcb_msr(); > + > + if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > + return -EIO; > + > + *eax = (val >> 32); > + } > + > + if (ebx) { > + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(func, GHCB_CPUID_REQ_EBX)); > + VMGEXIT(); > + val = sev_es_rd_ghcb_msr(); > + > + if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > + return -EIO; > + > + *ebx = (val >> 32); > + } > + > + if (ecx) { > + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(func, GHCB_CPUID_REQ_ECX)); > + VMGEXIT(); > + val = sev_es_rd_ghcb_msr(); > + > + if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > + return -EIO; > + > + *ecx = (val >> 32); > + } > + > + if (edx) { > + sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(func, GHCB_CPUID_REQ_EDX)); > + VMGEXIT(); > + val = sev_es_rd_ghcb_msr(); > + > + if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > + return -EIO; > + > + *edx = (val >> 32); > + } > + > + return 0; > +} > + > /* > * Boot VC Handler - This is the first VC handler during boot, there is no GHCB > * page yet, so it only supports the MSR based communication with the > @@ -202,39 +254,19 @@ enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, bool set_ghcb_msr, > void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code) > { > unsigned int fn = lower_bits(regs->ax, 32); > - unsigned long val; > + u32 eax, ebx, ecx, edx; > > /* Only CPUID is supported via MSR protocol */ > if (exit_code != SVM_EXIT_CPUID) > goto fail; > > - sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EAX)); > - VMGEXIT(); > - val = sev_es_rd_ghcb_msr(); > - if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > + if (sev_cpuid_hv(fn, 0, &eax, &ebx, &ecx, &edx)) > goto fail; > - regs->ax = val >> 32; > > - sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EBX)); > - VMGEXIT(); > - val = sev_es_rd_ghcb_msr(); > - if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > - goto fail; > - regs->bx = val >> 32; > - > - sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_ECX)); > - VMGEXIT(); > - val = sev_es_rd_ghcb_msr(); > - if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > - goto fail; > - regs->cx = val >> 32; > - > - sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EDX)); > - VMGEXIT(); > - val = sev_es_rd_ghcb_msr(); > - if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP) > - goto fail; > - regs->dx = val >> 32; > + regs->ax = eax; > + regs->bx = ebx; > + regs->cx = ecx; > + regs->dx = edx; What is the intent behind declaring e?x as local variables, instead of passing the addresses of regs->?x to sev_cpuid_hv()? Is it to prevent touching any of the regs->?x unless there is no error from sev_cpuid_hv()? If so, wouldn't it be better to hide this logic from the callers by declaring the local variables in sev_cpuid_hv() itself, and moving the four "*e?x = (val >> 32);" statements there to the end of the function (just before last the return)? With that change, the callers can safely pass the addresses of regs->?x to do_vc_no_ghcb(), knowing that the values will only be touched if there is no error? Venu