From:   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To:     =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
        Jianjun Wang <jianjun.wang@mediatek.com>,
        Ryder Lee <ryder.lee@mediatek.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        qizhong cheng <qizhong.cheng@mediatek.com>
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>,
        linux-arm-kernel@lists.infradead.org, chuanjia.liu@mediatek.com,
        linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] PCI: mediatek: Assert PERST# for 100ms for power and clock to stabilize
Date:   Fri,  7 Jan 2022 10:22:46 +0000
Message-Id: <164155095225.6775.655179565397700923.b4-ty@arm.com>
In-Reply-To: <20211227133110.14500-1-qizhong.cheng@mediatek.com>
References: <20211227133110.14500-1-qizhong.cheng@mediatek.com>
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On Mon, 27 Dec 2021 21:31:10 +0800, qizhong cheng wrote:
> Described in PCIe CEM specification sections 2.2 (PERST# Signal) and
> 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
> be delayed 100ms (TPVPERL) for the power and clock to become stable.
> 
> 

Applied to pci/mediatek, thanks!

[1/1] PCI: mediatek: Assert PERST# for 100ms for power and clock to stabilize
      https://git.kernel.org/lpieralisi/pci/c/65ace9a85f

Thanks,
Lorenzo