Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 907A3C433EF for ; Mon, 10 Jan 2022 15:50:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236597AbiAJPuR (ORCPT ); Mon, 10 Jan 2022 10:50:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236496AbiAJPuQ (ORCPT ); Mon, 10 Jan 2022 10:50:16 -0500 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 505DAC06173F; Mon, 10 Jan 2022 07:50:16 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id A0E241F4331A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1641829815; bh=Mq98CAQsrOIW0g+QklFgJ9yH0XPbIH913G1uW00CfqM=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=gA59ZS+CsS9TJj0vaclBxY8NNCJLCbO/af+/GozRHF2rTDrKK51PejjlPEh11GxzU cOqdbcXvN40HlM3q6vINPf4n6f2r1ggCPSsenuLSoLUShU0JzpjHLXhdSjD1DAL6RF dfE9XGA0SzEOX7ZFcWsJjYVTLFkOZ4mPlK0dbF4j1WdLDqI9II7PobTzNaPmCjej+7 RN4TiviZm6oOLBdlh5Ob/CoqxDj2TPIG7GYmsoUlEFpAYWUIsVayjTw/G4Na6U1IJn dgwFspXseICaGzuPV8+TL9GhbigmEcI/lRUtOXdibtNIs85Jes6bZlS6Bwv312Eh3S KUaL1rI7VPMZQ== Subject: Re: [v1 09/16] clk: mediatek: Add MT8186 mmsys clock support To: Chun-Jie Chen , Matthias Brugger , Stephen Boyd , Nicolas Boichat , Rob Herring Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Project_Global_Chrome_Upstream_Group@mediatek.com References: <20220110134416.5191-1-chun-jie.chen@mediatek.com> <20220110134416.5191-10-chun-jie.chen@mediatek.com> From: AngeloGioacchino Del Regno Message-ID: <503854db-055a-0f17-ae4e-7ca259f5d655@collabora.com> Date: Mon, 10 Jan 2022 16:50:11 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20220110134416.5191-10-chun-jie.chen@mediatek.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 10/01/22 14:44, Chun-Jie Chen ha scritto: > Add MT8186 mmsys clock controller which provides clock gate > control in video system. This is integrated with mtk-mmsys > driver which will populate device by platform_device_register_data > to start mmsys clock driver. > > Signed-off-by: Chun-Jie Chen Acked-by: AngeloGioacchino Del Regno