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In-Reply-To: <20211226153349.2296024-1-nikita.yoush@cogentembedded.com>
From:   Geert Uytterhoeven <geert@linux-m68k.org>
Date:   Mon, 10 Jan 2022 16:56:44 +0100
Message-ID: <CAMuHMdUJfq+nFFMoiPiTt1=Ny9zOm-O1EAmq3n56n4RJ6H8tdA@mail.gmail.com>
Subject: Re: [PATCH 3/3 v2] arm64: dts: renesas: add MOST device
To:     Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc:     Magnus Damm <magnus.damm@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Christian Gromm <christian.gromm@microchip.com>,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>, linux-staging@lists.linux.dev,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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Hi Nikita,

On Sun, Dec 26, 2021 at 4:34 PM Nikita Yushchenko
<nikita.yoush@cogentembedded.com> wrote:
> This patch adds mlp device to dtsi files for R-Car Gen3 SoCs that have
> it.
>
> Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
> ---
> Change from v1:
> - fix power domain ids so all dtbs build properly

Thanks for the update!

> --- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
> @@ -2412,6 +2412,19 @@ ssi9: ssi-9 {
>                         };
>                 };
>
> +               mlp: mlp@ec520000 {
> +                       compatible = "renesas,rcar-gen3-mlp";

No SoC-specific compatible value?

> +                       reg = <0 0xec520000 0 0x800>;
> +                       interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
> +                               <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
> +                               <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
> +                               <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
> +                               <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>;

What is the purpose of the various interrupts?
Perhaps you need interrupt-names?
The driver seems to use only the first two, which is strange, as
the second and third interrupt handle different channels.

> +                       clocks = <&cpg CPG_MOD 802>;
> +                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;

Missing resets property?

> +                       status = "disabled";
> +               };
> +

The rest looks sane to me.  But without any DT binding documentation
for this hardware block, this is hard to validate, and not yet ready for
upstream integration.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds