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[94.29.62.108]) by smtp.googlemail.com with ESMTPSA id k32sm1640497lfv.196.2022.01.12.05.28.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Jan 2022 05:28:42 -0800 (PST) Subject: Re: [PATCH v2 0/3] clk: Implement a clock request API To: Maxime Ripard , Mike Turquette , Stephen Boyd , dri-devel@lists.freedesktop.org, Daniel Vetter , David Airlie , Maarten Lankhorst , Thomas Zimmermann , Thierry Reding Cc: Maxime Ripard , linux-clk@vger.kernel.org, Dave Stevenson , Phil Elwell , Tim Gover , Dom Cobley , Emma Anholt , linux-kernel@vger.kernel.org, Russell King References: <20210914093515.260031-1-maxime@cerno.tech> From: Dmitry Osipenko Message-ID: Date: Wed, 12 Jan 2022 16:28:41 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20210914093515.260031-1-maxime@cerno.tech> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 14.09.2021 12:35, Maxime Ripard пишет: > Hi, > > This is a follow-up of the discussion here: > https://lore.kernel.org/linux-clk/20210319150355.xzw7ikwdaga2dwhv@gilmour/ > > This implements a mechanism to raise and lower clock rates based on consumer > workloads, with an example of such an implementation for the RaspberryPi4 HDMI > controller. > > There's a couple of things worth discussing: > > - The name is in conflict with clk_request_rate, and even though it feels > like the right name to me, we should probably avoid any confusion > > - The code so far implements a policy of always going for the lowest rate > possible. While we don't have an use-case for something else, this should > maybe be made more flexible? Hello Maxime, On NVIDIA Tegra we use interconnect framework for converting of workload-based memory bandwidth requirement to the memory clock rate [1]. All Tegra SoCs have two display controllers and other memory clients, ICC takes care of summing and updating memory bandwidth for us, which in the end results in a freq change of the shared memory controller. [1] https://git.kernel.org/linus/04d5d5df9 Not so long time ago me and Thierry Reding were looking at yours v1 and back then Thierry suggested that the same ICC approach might work for yours case. I'm now looking at the v2 and yours discussion with Stephen Boyd, and it appears that ICC is indeed what you really need. Have you considered to use ICC?