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Miller" , Jakub Kicinski , Oleksij Rempel , Heiner Kallweit , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "stable@vger.kernel.org" Subject: RE: [PATCH net v2] net: phy: marvell: add Marvell specific PHY loopback Thread-Topic: [PATCH net v2] net: phy: marvell: add Marvell specific PHY loopback Thread-Index: AQHYB5efdv1tXs/AiUepicn/jvMmF6xfXQeAgACh7IA= Date: Wed, 12 Jan 2022 22:55:27 +0000 Message-ID: References: <20220112093344.27894-1-mohammad.athari.ismail@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.6.200.16 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 3ad56442-c6e9-4955-0c2c-08d9d61ea07f x-ms-traffictypediagnostic: DM6PR11MB4092:EE_ x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:8882; x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO1PR11MB4771.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3ad56442-c6e9-4955-0c2c-08d9d61ea07f X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Jan 2022 22:55:27.8585 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: seic0EkxVtwaVBY/fD5Rl7fIOmL52x24rPLPYfRRSlPYLgNkvtCRxcXl8xBT/N5vf0nPbo73HFLucFyN5+EhOkifgDWOd3rRD9AQxZosZ2TKuSluO+B1jaGA7nSMZ3jL X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR11MB4092 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Russell King > Sent: Wednesday, January 12, 2022 9:13 PM > To: Ismail, Mohammad Athari > Cc: Andrew Lunn ; David S . Miller > ; Jakub Kicinski ; Oleksij > Rempel ; Heiner Kallweit > ; netdev@vger.kernel.org; linux- > kernel@vger.kernel.org; stable@vger.kernel.org > Subject: Re: [PATCH net v2] net: phy: marvell: add Marvell specific PHY > loopback >=20 > On Wed, Jan 12, 2022 at 05:33:44PM +0800, Mohammad Athari Bin Ismail > wrote: > > +static int marvell_loopback(struct phy_device *phydev, bool enable) { > > + if (enable) { > > + u16 bmcr_ctl =3D 0, mscr2_ctl =3D 0; > > + > > + if (phydev->speed =3D=3D SPEED_1000) > > + bmcr_ctl =3D BMCR_SPEED1000; > > + else if (phydev->speed =3D=3D SPEED_100) > > + bmcr_ctl =3D BMCR_SPEED100; > > + > > + if (phydev->duplex =3D=3D DUPLEX_FULL) > > + bmcr_ctl |=3D BMCR_FULLDPLX; > > + > > + phy_modify(phydev, MII_BMCR, ~0, bmcr_ctl); >=20 > Is there any point in doing a read-modify-write here if you're just setti= ng all > bits in the register? Wouldn't phy_write() be more appropriate? What abou= t > error handing? Yes, you're right. phy_write() is more suitable. And will add error handlin= g as well. Will include them in v3 patch. >=20 > > + > > + if (phydev->speed =3D=3D SPEED_1000) > > + mscr2_ctl =3D BMCR_SPEED1000; > > + else if (phydev->speed =3D=3D SPEED_100) > > + mscr2_ctl =3D BMCR_SPEED100; > > + > > + phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE, > > + MII_88E1510_MSCR_2, BMCR_SPEED1000 | > > + BMCR_SPEED100, mscr2_ctl); > > + I believe this also need error handling. > > + /* Need soft reset to have speed configuration takes effect > */ > > + genphy_soft_reset(phydev); Ditto. > > + > > + /* FIXME: Based on trial and error test, it seem 1G need to > have > > + * delay between soft reset and loopback enablement. > > + */ > > + if (phydev->speed =3D=3D SPEED_1000) > > + msleep(1000); > > + > > + return phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, > > + BMCR_LOOPBACK); > > + } else { > > + phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0); >=20 > Error handling? Will add it in v3 patch. -Athari- >=20 > Thanks. >=20 > -- > RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ > FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!