Date:   Fri, 14 Jan 2022 13:28:46 +0530
From:   "Naveen N. Rao" <naveen.n.rao@linux.ibm.com>
Subject: Re: [PATCH] powerpc/bpf: Always reallocate BPF_REG_5, BPF_REG_AX and
 TMP_REG when possible
To:     Benjamin Herrenschmidt <benh@kernel.crashing.org>,
        Christophe Leroy <christophe.leroy@csgroup.eu>,
        Michael Ellerman <mpe@ellerman.id.au>,
        Paul Mackerras <paulus@samba.org>
Cc:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>
References: <b04c246874b716911139c04bc004b3b14eed07ef.1641817763.git.christophe.leroy@csgroup.eu>
In-Reply-To: <b04c246874b716911139c04bc004b3b14eed07ef.1641817763.git.christophe.leroy@csgroup.eu>
MIME-Version: 1.0
User-Agent: astroid/v0.16-1-g4d6b06ad (https://github.com/astroidmail/astroid)
Message-Id: <1642147004.dum5th9cvl.naveen@linux.ibm.com>
Content-Type: text/plain; charset=utf-8; format=flowed
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

Christophe Leroy wrote:
> BPF_REG_5, BPF_REG_AX and TMP_REG are mapped on non volatile registers
> because there are not enough volatile registers, but they don't need
> to be preserved on function calls.
>=20
> So when some volatile registers become available, those registers can
> always be reallocated regardless of whether SEEN_FUNC is set or not.
>=20
> Suggested-by: Naveen N. Rao <naveen.n.rao@linux.ibm.com>
> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
> ---
>  arch/powerpc/net/bpf_jit.h        |  3 ---
>  arch/powerpc/net/bpf_jit_comp32.c | 14 +++++++++++---
>  2 files changed, 11 insertions(+), 6 deletions(-)
>=20
> diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
> index b20a2a83a6e7..b75507fc8f6b 100644
> --- a/arch/powerpc/net/bpf_jit.h
> +++ b/arch/powerpc/net/bpf_jit.h
> @@ -127,9 +127,6 @@
>  #define SEEN_FUNC	0x20000000 /* might call external helpers */
>  #define SEEN_TAILCALL	0x40000000 /* uses tail calls */
> =20
> -#define SEEN_VREG_MASK	0x1ff80000 /* Volatile registers r3-r12 */
> -#define SEEN_NVREG_MASK	0x0003ffff /* Non volatile registers r14-r31 */
> -
>  #ifdef CONFIG_PPC64
>  extern const int b2p[MAX_BPF_JIT_REG + 2];
>  #else
> diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit=
_comp32.c
> index d3a52cd42f53..cfec42c8a511 100644
> --- a/arch/powerpc/net/bpf_jit_comp32.c
> +++ b/arch/powerpc/net/bpf_jit_comp32.c
> @@ -77,14 +77,22 @@ static int bpf_jit_stack_offsetof(struct codegen_cont=
ext *ctx, int reg)
>  	return BPF_PPC_STACKFRAME(ctx) - 4;
>  }
> =20
> +#define SEEN_VREG_MASK		0x1ff80000 /* Volatile registers r3-r12 */
> +#define SEEN_NVREG_FULL_MASK	0x0003ffff /* Non volatile registers r14-r3=
1 */
> +#define SEEN_NVREG_TEMP_MASK	0x00001e01 /* BPF_REG_5, BPF_REG_AX, TMP_RE=
G */

Could have been named better: SEEN_NVREG_BPF_VGER_MASK, or such.
Apart from that:
Reviewed-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>