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[31.178.191.245]) by smtp.gmail.com with ESMTPSA id cf42sm1322134lfb.251.2022.01.17.00.43.52 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Jan 2022 00:43:52 -0800 (PST) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 14.0 \(3654.120.0.1.13\)) Subject: Re: [PATCH 5/9] arm64: dts: rockchip: add rk3568 tsadc nodes From: Piotr Oniszczuk In-Reply-To: <20210728135534.703028-6-pgwipeout@gmail.com> Date: Mon, 17 Jan 2022 09:43:49 +0100 Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Heiko Stuebner , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , linux-rockchip@lists.infradead.org, "linux-kernel@vger.kernel.org" Content-Transfer-Encoding: quoted-printable Message-Id: References: <20210728135534.703028-1-pgwipeout@gmail.com> <20210728135534.703028-6-pgwipeout@gmail.com> To: Peter Geis X-Mailer: Apple Mail (2.3654.120.0.1.13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Wiadomo=C5=9B=C4=87 napisana przez Peter Geis w = dniu 28.07.2021, o godz. 15:55: >=20 > Add the thermal and tsadc nodes to the rk3568 device tree. > There are two sensors, one for the cpu, one for the gpu. >=20 > Signed-off-by: Peter Geis > --- > .../boot/dts/rockchip/rk3568-pinctrl.dtsi | 6 ++ > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 71 +++++++++++++++++++ > 2 files changed, 77 insertions(+) >=20 > diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi = b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > index a588ca95ace2..b464c7bda1f7 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi > @@ -2420,6 +2420,12 @@ spi3m1_cs1: spi3m1-cs1 { > }; >=20 > tsadc { > + /omit-if-no-ref/ > + tsadc_gpio: tsadc-gpio { > + rockchip,pins =3D > + <0 RK_PA1 0 &pcfg_pull_none>; > + }; > + > /omit-if-no-ref/ > tsadcm0_shut: tsadcm0-shut { > rockchip,pins =3D > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi = b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > index 77c679304916..0905fac0726a 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > @@ -51,6 +51,7 @@ cpu0: cpu@0 { > compatible =3D "arm,cortex-a55"; > reg =3D <0x0 0x0>; > clocks =3D <&scmi_clk 0>; > + #cooling-cells =3D <2>; > enable-method =3D "psci"; > operating-points-v2 =3D <&cpu0_opp_table>; > }; > @@ -59,6 +60,7 @@ cpu1: cpu@100 { > device_type =3D "cpu"; > compatible =3D "arm,cortex-a55"; > reg =3D <0x0 0x100>; > + #cooling-cells =3D <2>; > enable-method =3D "psci"; > operating-points-v2 =3D <&cpu0_opp_table>; > }; > @@ -67,6 +69,7 @@ cpu2: cpu@200 { > device_type =3D "cpu"; > compatible =3D "arm,cortex-a55"; > reg =3D <0x0 0x200>; > + #cooling-cells =3D <2>; > enable-method =3D "psci"; > operating-points-v2 =3D <&cpu0_opp_table>; > }; > @@ -75,6 +78,7 @@ cpu3: cpu@300 { > device_type =3D "cpu"; > compatible =3D "arm,cortex-a55"; > reg =3D <0x0 0x300>; > + #cooling-cells =3D <2>; > enable-method =3D "psci"; > operating-points-v2 =3D <&cpu0_opp_table>; > }; > @@ -774,6 +778,73 @@ uart9: serial@fe6d0000 { > status =3D "disabled"; > }; >=20 > + thermal_zones: thermal-zones { > + cpu_thermal: cpu-thermal { > + polling-delay-passive =3D <100>; > + polling-delay =3D <1000>; > + > + thermal-sensors =3D <&tsadc 0>; > + > + trips { > + cpu_alert0: cpu_alert0 { > + temperature =3D <70000>; > + hysteresis =3D <2000>; > + type =3D "passive"; > + }; > + cpu_alert1: cpu_alert1 { > + temperature =3D <75000>; > + hysteresis =3D <2000>; > + type =3D "passive"; > + }; > + cpu_crit: cpu_crit { > + temperature =3D <95000>; > + hysteresis =3D <2000>; > + type =3D "critical"; > + }; > + }; > + > + cooling-maps { > + map0 { > + trip =3D <&cpu_alert0>; > + cooling-device =3D > + <&cpu0 THERMAL_NO_LIMIT = THERMAL_NO_LIMIT>, > + <&cpu1 THERMAL_NO_LIMIT = THERMAL_NO_LIMIT>, > + <&cpu2 THERMAL_NO_LIMIT = THERMAL_NO_LIMIT>, > + <&cpu3 THERMAL_NO_LIMIT = THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + gpu_thermal: gpu-thermal { > + polling-delay-passive =3D <20>; /* milliseconds = */ > + polling-delay =3D <1000>; /* milliseconds */ > + > + thermal-sensors =3D <&tsadc 1>; > + }; > + }; > + > + tsadc: tsadc@fe710000 { > + compatible =3D "rockchip,rk3568-tsadc"; > + reg =3D <0x0 0xfe710000 0x0 0x100>; > + interrupts =3D ; > + assigned-clocks =3D <&cru CLK_TSADC_TSEN>, <&cru = CLK_TSADC>; > + assigned-clock-rates =3D <17000000>, <700000>; > + clocks =3D <&cru CLK_TSADC>, <&cru PCLK_TSADC>; > + clock-names =3D "tsadc", "apb_pclk"; > + resets =3D <&cru SRST_TSADC>, <&cru SRST_P_TSADC>, > + <&cru SRST_TSADCPHY>; > + reset-names =3D "tsadc", "tsadc-apb", "tsadc-phy"; > + rockchip,grf =3D <&grf>; > + rockchip,hw-tshut-temp =3D <95000>; > + rockchip,hw-tshut-mode =3D <1>; /* tshut mode 0:CRU = 1:GPIO */ > + rockchip,hw-tshut-polarity =3D <0>; /* tshut polarity = 0:LOW 1:HIGH */ > + pinctrl-names =3D "gpio", "otpout"; > + pinctrl-0 =3D <&tsadc_gpio>; > + pinctrl-1 =3D <&tsadc_shutorg>; > + #thermal-sensor-cells =3D <1>; > + status =3D "disabled"; > + }; > + > saradc: saradc@fe720000 { > compatible =3D "rockchip,rk3568-saradc", = "rockchip,rk3399-saradc"; > reg =3D <0x0 0xfe720000 0x0 0x100>; > --=20 > 2.25.1 >=20 >=20 > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip Peter, I'm trying to use this series to get thermal on rk3566 based tvbox = (x96-x6). Driver loads but i'm getting following error: [ 132.873979] rockchip-thermal fe710000.tsadc: failed to register = sensor 0: -517 [ 132.874650] rockchip-thermal fe710000.tsadc: failed to register = sensor[0] : error =3D -517 Maybe you have some hints here?