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From:   Chen-Yu Tsai <wenst@chromium.org>
Date:   Tue, 18 Jan 2022 11:47:36 +0800
Message-ID: <CAGXv+5GRqQFHsxZMaK0VT534rQvQTx5-h1U63mFSUQuAHRGmkA@mail.gmail.com>
Subject: Re: [PATCH 0/7] pinctrl: mediatek: Fixes and minor improvements
To:     Linus Walleij <linus.walleij@linaro.org>
Cc:     Sean Wang <sean.wang@kernel.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Zhiyong Tao <zhiyong.tao@mediatek.com>,
        Guodong Liu <guodong.liu@mediatek.com>
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Hi Linus,

On Sun, Jan 16, 2022 at 8:49 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Tue, Jan 11, 2022 at 12:22 PM Chen-Yu Tsai <wenst@chromium.org> wrote:
>
> > Here are some fixes and minor improvements to generic pinconf and the
> > Mediatek Paris pinctrl driver.
>
> Looks good to me, can you rebase this on v5.17-rc1 once it is out
> and I will queue it!

Thanks for the vote of confidence! I think patch 7 still needs some work.
I will likely split that into two parts:
a. pin config readback of the advanced drive strength mode into
   PIN_CONFIG_DRIVE_STRENGTH_UA, and
b. Supporting setting advanced drive strength mode via generic pin config
   properties.

The latter would require modification of the bindings in a way that might
not be describable. More about that is in my reply to patch 7.

In exchange, I will add on a code style rework requested by Angelo.


Regards
ChenYu