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From:   Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
To:     "David S . Miller" <davem@davemloft.net>,
        Jakub Kicinski <kuba@kernel.org>
Cc:     Giuseppe Cavallaro <peppe.cavallaro@st.com>,
        Alexandre Torgue <alexandre.torgue@st.com>,
        Jose Abreu <joabreu@synopsys.com>, netdev@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        nobuhiro1.iwamatsu@toshiba.co.jp, yuji2.ishikawa@toshiba.co.jp
Subject: [PATCH 0/2] net: stmmac: dwmac-visconti: Fix bit definitions and clock configuration for RMII mode
Date:   Tue, 18 Jan 2022 14:39:48 +0900
Message-Id: <20220118053950.2605-1-yuji2.ishikawa@toshiba.co.jp>
Precedence: bulk

Hi,

This series is a fix for RMII/MII operation mode of the dwmac-visconti driver.
It is composed of two parts:

* 1/2: fix constant definitions for cleared bits in ETHER_CLK_SEL register
* 2/2: fix configuration of ETHER_CLK_SEL register for running in RMII operation mode.

Best regards,
  Yuji

Yuji Ishikawa (2):
  net: stmmac: dwmac-visconti: Fix bit definitions for ETHER_CLK_SEL
  net: stmmac: dwmac-visconti: Fix clock configuration for RMII mode

 .../ethernet/stmicro/stmmac/dwmac-visconti.c  | 42 ++++++++++++-------
 1 file changed, 26 insertions(+), 16 deletions(-)

-- 
2.17.1