Received: by 2002:a05:6a10:af89:0:0:0:0 with SMTP id iu9csp1039355pxb; Fri, 21 Jan 2022 08:37:39 -0800 (PST) X-Google-Smtp-Source: ABdhPJyrhSHOp35UFF3NCsSgnUK/eFlp1u79iW23eTHxIO6NJScJ7GCiVeRGZ0EL6D4rty8u/WdE X-Received: by 2002:a17:902:d2cb:b0:14a:6e28:590e with SMTP id n11-20020a170902d2cb00b0014a6e28590emr4480189plc.53.1642783059464; Fri, 21 Jan 2022 08:37:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1642783059; cv=none; d=google.com; s=arc-20160816; b=ra5qDe5BIzg3JHM4/iUF/gVcCzWxObl74szK59870l7G9crvDzFxedo+BengnfWMoj IJNGhEicbLkub7Z9C0QK+wvFJmHQvS1efGihwHNqWHYjCaPOCt+/IVM5nmpaN2HqaSU6 k0TcyWRkuWbYVR+DogRSc8TDHxiMFUqWyK0/R7mYEdpVmvQgsWMYePnauHogwt6e2+Qq X9he9HfVSyYBKNyRO05CS+eYcPw99AInSDQFtVONFyXGz14VI+LvTwY7xiUygIP63Z52 zlezEeui70SL3/aiiXlu1fCRdbT4A5NTD0fCQ6wj9sd9bMBcilmSG3tOUlyxpI0zGynx wZug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from; bh=1l+JN9/P/Wkfq6zuh9QMpMroGxoGsZYPim/jShV7MMA=; b=DbtI4qRrIgrxxqU4JLUYum26oQOTq7yeB+T6J0WG3J0rhlHhyWwCmgNvNhBB6vCcWu QoSZ0pMZq8qyejyzRYc2CNkhfhSv3Tlad00Sn3DlEJU9fzApKgj4buv9F1woTDotg6HM UZ7JMqoSWa5jl+vT8AsJlhCAF9y21/91sbPu62aBDAmrnMp9KJHQIJzF9A8diYe7JVKU Cln57EZG/7KjfMP9lqZQdQ6kMNRD08N+C0Lw19KbqHfmCPn2RRYOAhKl/EZf3lXOb2ie QbaDALhoiH5b2E0doS8SRq6jrZopEGKujD7efmHcNLbKw/LrTL2Sj8TDIngZOf7we4kW TfDg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=toshiba.co.jp Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x2si8281278plg.524.2022.01.21.08.37.27; Fri, 21 Jan 2022 08:37:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=toshiba.co.jp Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351585AbiASExv (ORCPT + 99 others); Tue, 18 Jan 2022 23:53:51 -0500 Received: from mo-csw1516.securemx.jp ([210.130.202.155]:48472 "EHLO mo-csw.securemx.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351335AbiASExu (ORCPT ); Tue, 18 Jan 2022 23:53:50 -0500 Received: by mo-csw.securemx.jp (mx-mo-csw1516) id 20J4qDKk018584; Wed, 19 Jan 2022 13:52:14 +0900 X-Iguazu-Qid: 34trXZuAsxlohqpaPS X-Iguazu-QSIG: v=2; s=0; t=1642567933; q=34trXZuAsxlohqpaPS; m=0yidoEs59p9yDaB5qifBWEqQ4TxJweLoniwSrs5tqCI= Received: from imx12-a.toshiba.co.jp (imx12-a.toshiba.co.jp [61.202.160.135]) by relay.securemx.jp (mx-mr1513) id 20J4qBLp037215 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Wed, 19 Jan 2022 13:52:12 +0900 X-SA-MID: 31820870 From: Yuji Ishikawa To: "David S . Miller" , Jakub Kicinski Cc: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, nobuhiro1.iwamatsu@toshiba.co.jp, yuji2.ishikawa@toshiba.co.jp Subject: [PATCH v2 0/2] net: stmmac: dwmac-visconti: Fix bit definitions and clock configuration for RMII mode Date: Wed, 19 Jan 2022 13:46:46 +0900 X-TSB-HOP: ON X-TSB-HOP2: ON Message-Id: <20220119044648.18094-1-yuji2.ishikawa@toshiba.co.jp> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, This series is a fix for RMII/MII operation mode of the dwmac-visconti driver. It is composed of two parts: * 1/2: fix constant definitions for cleared bits in ETHER_CLK_SEL register * 2/2: fix configuration of ETHER_CLK_SEL register for running in RMII operation mode. Best regards, Yuji net: stmmac: dwmac-visconti: Fix bit definitions for ETHER_CLK_SEL v1 -> v2: - added Fixes tag to commit message net: stmmac: dwmac-visconti: Fix clock configuration for RMII mode v1 -> v2: - added Fixes tag to commit message Yuji Ishikawa (2): net: stmmac: dwmac-visconti: Fix bit definitions for ETHER_CLK_SEL net: stmmac: dwmac-visconti: Fix clock configuration for RMII mode .../ethernet/stmicro/stmmac/dwmac-visconti.c | 42 ++++++++++++------- 1 file changed, 26 insertions(+), 16 deletions(-) -- 2.17.1