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Subject: Re: [PATCH] arm64: entry: Save some nops when CONFIG_ARM64_PSEUDO_NMI
 is not set
To:     <catalin.marinas@arm.com>, <will@kernel.org>,
        <mark.rutland@arm.com>, <marcan@marcan.st>, <maz@kernel.org>,
        <joey.gouly@arm.com>, <pcc@google.com>
CC:     <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>
References: <20220107085536.214501-1-heying24@huawei.com>
 <20220112032410.29231-1-heying24@huawei.com>
From:   He Ying <heying24@huawei.com>
Message-ID: <e6293ec4-7c56-194a-95f9-98b102d80b31@huawei.com>
Date:   Wed, 19 Jan 2022 14:40:58 +0800
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Hi all,

Ping. Any comments?

?? 2022/1/12 11:24, He Ying д??:
> Arm64 pseudo-NMI feature code brings some additional nops
> when CONFIG_ARM64_PSEUDO_NMI is not set, which is not
> necessary. So add necessary ifdeffery to avoid it.
>
> Signed-off-by: He Ying <heying24@huawei.com>
> ---
>   arch/arm64/kernel/entry.S | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index 2f69ae43941d..ffc32d3d909a 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -300,6 +300,7 @@ alternative_else_nop_endif
>   	str	w21, [sp, #S_SYSCALLNO]
>   	.endif
>   
> +#ifdef CONFIG_ARM64_PSEUDO_NMI
>   	/* Save pmr */
>   alternative_if ARM64_HAS_IRQ_PRIO_MASKING
>   	mrs_s	x20, SYS_ICC_PMR_EL1
> @@ -307,6 +308,7 @@ alternative_if ARM64_HAS_IRQ_PRIO_MASKING
>   	mov	x20, #GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET
>   	msr_s	SYS_ICC_PMR_EL1, x20
>   alternative_else_nop_endif
> +#endif
>   
>   	/* Re-enable tag checking (TCO set on exception entry) */
>   #ifdef CONFIG_ARM64_MTE
> @@ -330,6 +332,7 @@ alternative_else_nop_endif
>   	disable_daif
>   	.endif
>   
> +#ifdef CONFIG_ARM64_PSEUDO_NMI
>   	/* Restore pmr */
>   alternative_if ARM64_HAS_IRQ_PRIO_MASKING
>   	ldr	x20, [sp, #S_PMR_SAVE]
> @@ -339,6 +342,7 @@ alternative_if ARM64_HAS_IRQ_PRIO_MASKING
>   	dsb	sy				// Ensure priority change is seen by redistributor
>   .L__skip_pmr_sync\@:
>   alternative_else_nop_endif
> +#endif
>   
>   	ldp	x21, x22, [sp, #S_PC]		// load ELR, SPSR
>