Received: by 2002:a05:6a10:af89:0:0:0:0 with SMTP id iu9csp1093922pxb; Fri, 21 Jan 2022 09:43:14 -0800 (PST) X-Google-Smtp-Source: ABdhPJzdUVn2bjW7EXZs76AUzYhB6e5itg6PMYdV4SStXz5QVeYloc0VQyFwJ4W6lJwnvDOtrKG2 X-Received: by 2002:a63:ed01:: with SMTP id d1mr1507167pgi.145.1642786993879; Fri, 21 Jan 2022 09:43:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1642786993; cv=none; d=google.com; s=arc-20160816; b=XmmFHYNeDUZnDccdbr0NRpnYkNpjS+z3gOOSSVV/cTzT2OWI3YBEBeOKk+6UPuUhJY Xiy/pDgMV9EKMdvAKD74vRg8Y0D3u9Sm1ipMftqGKfDEp2F7XTBhulZJ7GSRRdR2Riuf WeMLJQGZXvxDhbwyrtrBU2WSB7chZ72Pk0czLHHJ52lpc0pSaL3gUeIt2zCAPjgrGniE Y8/no5B1Cx8bOEx/xfI3r3zTMuflT1Y+4O6GozOKNA2CFR3uCnR40RkAlH/HAgc8AzL9 A9CPyhGwBKtN3lHD2xMx9snS0pbNT8th7iUuCGxgh6U2wCJdq3DVxcFZdQ5J582g7k2y W1/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=fj2/tjtRuOonc7iK2ONdpAhh3xe9mbQ6EkTodIwAdEQ=; b=Quqqosr3hnONGnAJHcJ0UKW9qvmuGZHB6IhiOwHkLbcCRy9n4St0D2J5Fr+cVWdrTz Zc+4i8ReOcaDqf1qR62zPsgxCGTiLnnPWFfXhXzfVYsVE60myfBaYnfRDQmKqrjYyKkp AtDZ2lb3+cH+Lki4zvgf4s+t6D1gyxyXbZAQu7s1XVQ2sk2lQ6FCZG7Lzmz/jbF35gOo QFC+igmGc41s2hrqo1rABM4bbCg3zfjRabOtUtPyHDx4y+Ly5z61yPib1dIsXUMDDDab Z7/zwG+02NbzhxOwTprYZzc2hgVjsEOXeqLXcAHv218utUwZF2d3KVAx0rHVNQmBTWOR GjRQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r7si6233990pjz.79.2022.01.21.09.43.02; Fri, 21 Jan 2022 09:43:13 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351906AbiASHIU (ORCPT + 99 others); Wed, 19 Jan 2022 02:08:20 -0500 Received: from mail-sz.amlogic.com ([211.162.65.117]:18131 "EHLO mail-sz.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230223AbiASHIP (ORCPT ); Wed, 19 Jan 2022 02:08:15 -0500 Received: from droid09-sz.software.amlogic (10.28.8.19) by mail-sz.amlogic.com (10.28.11.5) with Microsoft SMTP Server id 15.1.2176.2; Wed, 19 Jan 2022 15:08:12 +0800 From: Qianggui Song To: Thomas Gleixner , Marc Zyngier CC: Qianggui Song , Kevin Hilman , Neil Armstrong , Jerome Brunet , Martin Blumenstingl , , , Subject: [PATCH v2 2/4] irqchip/meson-gpio: support more than 8 channels gpio irq line Date: Wed, 19 Jan 2022 15:08:07 +0800 Message-ID: <20220119070809.15563-3-qianggui.song@amlogic.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220119070809.15563-1-qianggui.song@amlogic.com> References: <20220119070809.15563-1-qianggui.song@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.28.8.19] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Current meson gpio irqchip driver only support 8 channels for gpio irq line, later chips may have more then 8 channels, so need to modify code to support more. Signed-off-by: Qianggui Song --- drivers/irqchip/irq-meson-gpio.c | 33 +++++++++++++++++++++++--------- 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-gpio.c index d90ff0b92480..eefe15e1b3a6 100644 --- a/drivers/irqchip/irq-meson-gpio.c +++ b/drivers/irqchip/irq-meson-gpio.c @@ -16,7 +16,6 @@ #include #include -#define NUM_CHANNEL 8 #define MAX_INPUT_MUX 256 #define REG_EDGE_POL 0x00 @@ -60,6 +59,7 @@ struct irq_ctl_ops { struct meson_gpio_irq_params { unsigned int nr_hwirq; + unsigned int nr_channels; bool support_edge_both; unsigned int edge_both_offset; unsigned int edge_single_offset; @@ -81,6 +81,7 @@ struct meson_gpio_irq_params { .edge_single_offset = 0, \ .pol_low_offset = 16, \ .pin_sel_mask = 0xff, \ + .nr_channels = 8, \ #define INIT_MESON_A1_COMMON_DATA(irqs) \ INIT_MESON_COMMON(irqs, meson_a1_gpio_irq_init, \ @@ -90,6 +91,7 @@ struct meson_gpio_irq_params { .edge_single_offset = 8, \ .pol_low_offset = 0, \ .pin_sel_mask = 0x7f, \ + .nr_channels = 8, \ static const struct meson_gpio_irq_params meson8_params = { INIT_MESON8_COMMON_DATA(134) @@ -136,8 +138,8 @@ static const struct of_device_id meson_irq_gpio_matches[] = { struct meson_gpio_irq_controller { const struct meson_gpio_irq_params *params; void __iomem *base; - u32 channel_irqs[NUM_CHANNEL]; - DECLARE_BITMAP(channel_map, NUM_CHANNEL); + u32 *channel_irqs; + unsigned long *channel_map; spinlock_t lock; }; @@ -207,8 +209,8 @@ meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl, spin_lock_irqsave(&ctl->lock, flags); /* Find a free channel */ - idx = find_first_zero_bit(ctl->channel_map, NUM_CHANNEL); - if (idx >= NUM_CHANNEL) { + idx = find_first_zero_bit(ctl->channel_map, ctl->params->nr_channels); + if (idx >= ctl->params->nr_channels) { spin_unlock_irqrestore(&ctl->lock, flags); pr_err("No channel available\n"); return -ENOSPC; @@ -447,13 +449,26 @@ static int meson_gpio_irq_parse_dt(struct device_node *node, struct meson_gpio_i ctl->params = match->data; + ctl->channel_irqs = kcalloc(ctl->params->nr_channels, sizeof(*ctl->channel_irqs), + GFP_KERNEL); + if (!ctl->channel_irqs) + return -ENOMEM; + + ctl->channel_map = bitmap_zalloc(ctl->params->nr_channels, GFP_KERNEL); + if (!ctl->channel_map) { + kfree(ctl->channel_irqs); + return -ENOMEM; + } + ret = of_property_read_variable_u32_array(node, "amlogic,channel-interrupts", ctl->channel_irqs, - NUM_CHANNEL, - NUM_CHANNEL); + ctl->params->nr_channels, + ctl->params->nr_channels); if (ret < 0) { - pr_err("can't get %d channel interrupts\n", NUM_CHANNEL); + pr_err("can't get %d channel interrupts\n", ctl->params->nr_channels); + kfree(ctl->channel_map); + kfree(ctl->channel_irqs); return ret; } @@ -507,7 +522,7 @@ static int meson_gpio_irq_of_init(struct device_node *node, struct device_node * } pr_info("%d to %d gpio interrupt mux initialized\n", - ctl->params->nr_hwirq, NUM_CHANNEL); + ctl->params->nr_hwirq, ctl->params->nr_channels); return 0; -- 2.34.1