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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jan 2022 08:47:07.8701 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 16e66b86-e9c7-4fee-f763-08d9db2846aa X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT055.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB3891 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/12/2022 1:43 PM, Dmitry Osipenko wrote: > External email: Use caution opening links or attachments > > > 11.01.2022 21:45, Ashish Mhetre пишет: >> >> @@ -765,16 +768,21 @@ static int tegra_mc_probe(struct platform_device *pdev) >> return err; >> } >> >> - if (mc->soc->ops && mc->soc->ops->handle_irq) { >> + if (mc->soc->interrupt_ops && mc->soc->interrupt_ops->handle_irq) { >> mc->irq = platform_get_irq(pdev, 0); >> if (mc->irq < 0) >> return mc->irq; >> >> WARN(!mc->soc->client_id_mask, "missing client ID mask for this SoC\n"); >> >> + /* clear any mc-errs that occurred before. */ > > s/mc-errs/Memory Controller errors/ > Sure, I'll update these in next version. >> + if (mc->soc->interrupt_ops->clear_interrupt) >> + mc->soc->interrupt_ops->clear_interrupt(mc); > > There is no explanation of this change neither in the code, nor in the > commit message. Please always provide detailed descriptions for a > non-trivial changes. > > Interrupts aren't cleared intentionally by the driver, otherwise you'll > never know about early-boot memory faults which happened before the > probe. Hence this change is incorrect. That's true, we should be logging early-boot memory faults as well. Ideally there shouldn't be any early-boot faults as all clients will be up after MC, right? But I agree that we should be checking and logging if any interrupt is present.