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[23.128.96.18]) by mx.google.com with ESMTP id bi6si6913715plb.279.2022.01.21.13.10.42; Fri, 21 Jan 2022 13:10:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359228AbiATInX (ORCPT + 99 others); Thu, 20 Jan 2022 03:43:23 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:46408 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359323AbiATInL (ORCPT ); Thu, 20 Jan 2022 03:43:11 -0500 Received: from [10.18.29.173] (10.18.29.173) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Thu, 20 Jan 2022 16:43:05 +0800 Content-Type: multipart/mixed; boundary="------------q58WCOKn6neNIicBJ4XYn7xz" Message-ID: Date: Thu, 20 Jan 2022 16:43:05 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.4.1 Subject: Re: [PATCH V6 0/5] Use CCF to describe the UART baud rate clock Content-Language: en-US To: Kevin Hilman , , , , CC: Greg Kroah-Hartman , Jiri Slaby , Neil Armstrong , Jerome Brunet , Martin Blumenstingl References: <20220118030911.12815-1-yu.tu@amlogic.com> <7hfspjqrn7.fsf@baylibre.com> From: Yu Tu In-Reply-To: <7hfspjqrn7.fsf@baylibre.com> X-Originating-IP: [10.18.29.173] X-ClientProxiedBy: mail-sh.amlogic.com (10.18.11.5) To mail-sh.amlogic.com (10.18.11.5) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --------------q58WCOKn6neNIicBJ4XYn7xz Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Hi Kevin, Thank you very much for your reply. On 2022/1/20 6:37, Kevin Hilman wrote: > [ EXTERNAL EMAIL ] > > Hello, > > Yu Tu writes: > >> Using the common Clock code to describe the UART baud rate >> clock makes it easier for the UART driver to be compatible >> with the baud rate requirements of the UART IP on different >> meson chips. Add Meson S4 SoC compatible. > > Could you describe how this was tested and on which SoCs? There seem to > be some changes in this series that might affect previous SoCs. > For me, the board starts normally and prints. My intention was to add the S4 SOC UART compatible, but for the S4 our baud rate clock is calculated at 12MHz by default.So a series of changes were made at your suggestion. Since most SoCs are too old, I was able to find all the platforms myself such as Meson6, Meson8, Meson8b, GXL and so on. I only tested it with G12A and S4.But when I talked to Martin earlier he tried meson8b's log. The test patch is in the attachment. I have found that on some boards with this change, the initcall_debug Uart driver takes longer to initialize. Running the stty command to change the baud rate at the same time may cause a jam. I'd love to know what else you suggest. > Thanks, > > Kevin > > --------------q58WCOKn6neNIicBJ4XYn7xz Content-Type: text/plain; charset="UTF-8"; name="g12a-clk-debug-output" Content-Disposition: attachment; filename="g12a-clk-debug-output" Content-Transfer-Encoding: base64 77u/IyBjYXQgL3N5cy9rZXJuZWwvZGVidWcvY2xrLy9jbGtfc3VtbWFyeSB8IGhlYWQNCiAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIGVuYWJsZSAgcHJlcGFyZSAgcHJvdGVj dCAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgZHV0eSAgaGFyZHdhcmUNCiAgIGNs b2NrICAgICAgICAgICAgICAgICAgICAgICAgICBjb3VudCAgICBjb3VudCAgICBjb3VudCAg ICAgICAgcmF0ZSAgIGFjY3VyYWN5IHBoYXNlICBjeWNsZSAgICBlbmFibGUNCi0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0NCiB4dGFsICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgNiAgICAgICAgNiAgICAgICAgMCAgICAyNDAw MDAwMCAgICAgICAgICAwICAgICAwICA1MDAwMCAgICAgICAgIFkNCiAgICBmZjgwMzAwMC5z ZXJpYWwjeHRhbF9kaXYgICAgICAgICAgMSAgICAgICAgMSAgICAgICAgMCAgICAxMjAwMDAw MCAgICAgICAgICAwICAgICAwICA1MDAwMCAgICAgICAgIFkNCiAgICAgICBmZjgwMzAwMC5z ZXJpYWwjdXNlX3h0YWwgICAgICAgMSAgICAgICAgMSAgICAgICAgMCAgICAxMjAwMDAwMCAg ICAgICAgICAwICAgICAwICA1MDAwMCAgICAgICAgIFkNCiAgICAgICAgICBmZjgwMzAwMC5z ZXJpYWwjYmF1ZF9kaXYgICAgICAgMSAgICAgICAgMSAgICAgICAgMCAgICAgIDExNTM4NSAg ICAgICAgICAwICAgICAwICA1MDAwMCAgICAgICAgIFkNCiAgICBjdHNfb3NjaW4gICAgICAg ICAgICAgICAgICAgICAgICAgMCAgICAgICAgMCAgICAgICAgMCAgICAyNDAwMDAwMCAgICAg ICAgICAwICAgICAwICA1MDAwMCAgICAgICAgIFkNCiAgICAgICBnMTJhX2FvX2NlY19wcmUg ICAgICAgICAgICAgICAgMCAgICAgICAgMCAgICAgICAgMCAgICAyNDAwMDAwMCAgICAgICAg ICAwICAgICAwICA1MDAwMCAgICAgICAgIE4NCiAgICAgICAgICBnMTJhX2FvX2NlY19kaXYg ICAgICAgICAgICAgMCAgICAgICAgMCAgICAgICAgMCAgICAgICAzMjc0MiAgICAgICAgICAw ICAgICAwICA1MDAwMCAgICAgICAgIFkNCg== --------------q58WCOKn6neNIicBJ4XYn7xz Content-Type: text/plain; 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