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Thu, 20 Jan 2022 10:51:57 -0800 (PST) Received: from localhost ([12.3.194.138]) by smtp.gmail.com with ESMTPSA id m11sm2968926pgb.15.2022.01.20.10.51.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jan 2022 10:51:57 -0800 (PST) Date: Thu, 20 Jan 2022 10:51:57 -0800 (PST) X-Google-Original-Date: Thu, 20 Jan 2022 10:47:08 PST (-0800) Subject: Re: [PATCH v4 1/3] riscv: dts: Add dma-channels property in dma node In-Reply-To: <163a2cf11b2aceee2a1b8dc83251576d2371d4a6.1642383007.git.zong.li@sifive.com> CC: robh+dt@kernel.org, Paul Walmsley , aou@eecs.berkeley.edu, krzysztof.kozlowski@canonical.com, conor.dooley@microchip.com, geert@linux-m68k.org, bin.meng@windriver.com, green.wan@sifive.com, vkoul@kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, zong.li@sifive.com From: Palmer Dabbelt To: zong.li@sifive.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 16 Jan 2022 17:35:26 PST (-0800), zong.li@sifive.com wrote: > Add dma-channels property, then we can determine how many channels there > by device tree. > > Signed-off-by: Zong Li > --- > arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 1 + > arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > index c9f6d205d2ba..3c48f2d7a4a4 100644 > --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi > @@ -188,6 +188,7 @@ dma@3000000 { > reg = <0x0 0x3000000 0x0 0x8000>; > interrupt-parent = <&plic>; > interrupts = <23 24 25 26 27 28 29 30>; > + dma-channels = <4>; > #dma-cells = <1>; > }; > > diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > index 0655b5c4201d..2bdfe7f06e4b 100644 > --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > @@ -171,6 +171,7 @@ dma: dma@3000000 { > reg = <0x0 0x3000000 0x0 0x8000>; > interrupt-parent = <&plic0>; > interrupts = <23 24 25 26 27 28 29 30>; > + dma-channels = <4>; > #dma-cells = <1>; > }; > uart1: serial@10011000 { I've got some comments in on the bindings, but I'm assuming it's easier to keep these all together. Happy to take this through the RISC-V tree, but I'm guessing it'll be easier to take these via dmaengine as there's a lot more diff there so Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Thanks!