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[23.128.96.18]) by mx.google.com with ESMTP id i13si9882168plr.550.2022.01.21.16.29.35; Fri, 21 Jan 2022 16:29:49 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=k41BhGLh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378485AbiAUCVU (ORCPT + 99 others); Thu, 20 Jan 2022 21:21:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348465AbiAUCVT (ORCPT ); Thu, 20 Jan 2022 21:21:19 -0500 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA40DC06173F for ; Thu, 20 Jan 2022 18:21:18 -0800 (PST) Received: by mail-lf1-x132.google.com with SMTP id m3so28932645lfu.0 for ; Thu, 20 Jan 2022 18:21:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=90SUwfZKnXAN2kM8GActo5Koq5JSCVfHKRRzgtkh5Os=; b=k41BhGLhKcQl33sjtk33LyRdUWfPbdGkg2+xYsaQP1bZcwv6NvVelCFt09dvXXlM/E LR2VgnNKeXQnlubrwXg/fRlKBaiomOtFGb2upZd8Uc3pHkOOy1Nq6dnia7X+Lay85xTM GOKJ9KMsNIgvt3VE1PaHwh3vXNUZ8URxwiKJntcFTa60dzZS66aLQEdpup9SAhT24yTj UkpmilzA5C9FmX0W2IT1WW5yNuLaTu5hjsIzHhf2scfRXGabfT7astzzgPRRByydQbrQ jCSLlqjnLqLipVYhrEqnwiBT3TjRa9iWZxh4oXD7eTX6ysIpjgAVCXQ3E4kJwHfGmwVR RR8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=90SUwfZKnXAN2kM8GActo5Koq5JSCVfHKRRzgtkh5Os=; b=WVtc2CajlPiYT6x+5LpUtx/Jz5mtdJ0oxYI1ApQd9mjnMUCfJmr/zpHmd5A+XbfMcB N9UKviqXSZV6DEh4XZY2AEu/y/TNmzKXXjirZ+wNddlAvfrq+UkMhra3CtuW3z7ollN4 bdTnstAJ8urIIyEsOWrOC+n/9jZWnzO3Dm9d1Ze/GfzBjFc6bf/NsjubXrI1meMm9UGx zELM9FsR6qqx6D5WK6z/VNs9cEUpevYDRBakoQFGQyonJ6LaVIfGUZ58QBr//EVn7GAK Il8LewhGp8EKJWYS3AsMNHAU33qXPpe5N0XZAXUl45Hnyd6b2XtN+wijwPHjV3qC6GTv wd8w== X-Gm-Message-State: AOAM533eTkFR6E6zQYsfsqI/2mHrFkhxNCEBmKX04jEWQKWwi3/6NI15 LFv88QbBGqP75QA0kELKKlhXu1R7OYR4Jq7lx2NRzQ== X-Received: by 2002:a05:6512:1114:: with SMTP id l20mr1955215lfg.410.1642731676933; Thu, 20 Jan 2022 18:21:16 -0800 (PST) MIME-Version: 1.0 References: <0d0b0a3ad703f5ef50611e2dd80439675bda666a.1642383007.git.zong.li@sifive.com> In-Reply-To: From: Zong Li Date: Fri, 21 Jan 2022 10:21:05 +0800 Message-ID: Subject: Re: [PATCH v4 3/3] dmaengine: sf-pdma: Get number of channel by device tree To: Palmer Dabbelt Cc: Rob Herring , Paul Walmsley , Albert Ou , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Bin Meng , Green Wan , Vinod , dmaengine , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "linux-kernel@vger.kernel.org List" , linux-riscv Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jan 21, 2022 at 2:52 AM Palmer Dabbelt wrote: > > On Sun, 16 Jan 2022 17:35:28 PST (-0800), zong.li@sifive.com wrote: > > It currently assumes that there are always four channels, it would > > cause the error if there is actually less than four channels. Change > > that by getting number of channel from device tree. > > > > For backwards-compatible, it uses the default value (i.e. 4) when there > > is no 'dma-channels' information in dts. > > Some of the same wording issues here as those I pointed out in the DT > bindings patch. > > > Signed-off-by: Zong Li > > --- > > drivers/dma/sf-pdma/sf-pdma.c | 20 +++++++++++++------- > > drivers/dma/sf-pdma/sf-pdma.h | 8 ++------ > > 2 files changed, 15 insertions(+), 13 deletions(-) > > > > diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c > > index f12606aeff87..1264add9897e 100644 > > --- a/drivers/dma/sf-pdma/sf-pdma.c > > +++ b/drivers/dma/sf-pdma/sf-pdma.c > > @@ -482,9 +482,7 @@ static void sf_pdma_setup_chans(struct sf_pdma *pdma) > > static int sf_pdma_probe(struct platform_device *pdev) > > { > > struct sf_pdma *pdma; > > - struct sf_pdma_chan *chan; > > struct resource *res; > > - int len, chans; > > int ret; > > const enum dma_slave_buswidth widths = > > DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES | > > @@ -492,13 +490,21 @@ static int sf_pdma_probe(struct platform_device *pdev) > > DMA_SLAVE_BUSWIDTH_16_BYTES | DMA_SLAVE_BUSWIDTH_32_BYTES | > > DMA_SLAVE_BUSWIDTH_64_BYTES; > > > > - chans = PDMA_NR_CH; > > - len = sizeof(*pdma) + sizeof(*chan) * chans; > > - pdma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL); > > + pdma = devm_kzalloc(&pdev->dev, sizeof(*pdma), GFP_KERNEL); > > if (!pdma) > > return -ENOMEM; > > > > - pdma->n_chans = chans; > > + ret = of_property_read_u32(pdev->dev.of_node, "dma-channels", > > + &pdma->n_chans); > > + if (ret) { > > + dev_notice(&pdev->dev, "set number of channels to default value: 4\n"); > > + pdma->n_chans = PDMA_MAX_NR_CH; > > + } > > + > > + if (pdma->n_chans > PDMA_MAX_NR_CH) { > > + dev_err(&pdev->dev, "the number of channels exceeds the maximum\n"); > > + return -EINVAL; > > Can we get away with just using only the number of channels the driver > actually supports? ie, just never sending an op to the channels above > MAX_NR_CH? That should leave us with nothing to track. It might be a bit like when pdma->n_chans is bigger than the maximum, set the pdma->chans to PDMA_MAX_NR_CH, then we could ensure that we don't access the channels above the maximum. If I understand correctly, I gave the similar thought in the thread of v2 patch, and there are some discussions on that, but this way seems to lead to hard-to-track problems. > > > + } > > > > res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > pdma->membase = devm_ioremap_resource(&pdev->dev, res); > > @@ -556,7 +562,7 @@ static int sf_pdma_remove(struct platform_device *pdev) > > struct sf_pdma_chan *ch; > > int i; > > > > - for (i = 0; i < PDMA_NR_CH; i++) { > > + for (i = 0; i < pdma->n_chans; i++) { > > ch = &pdma->chans[i]; > > > > devm_free_irq(&pdev->dev, ch->txirq, ch); > > diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h > > index 0c20167b097d..8127d792f639 100644 > > --- a/drivers/dma/sf-pdma/sf-pdma.h > > +++ b/drivers/dma/sf-pdma/sf-pdma.h > > @@ -22,11 +22,7 @@ > > #include "../dmaengine.h" > > #include "../virt-dma.h" > > > > -#define PDMA_NR_CH 4 > > - > > -#if (PDMA_NR_CH != 4) > > -#error "Please define PDMA_NR_CH to 4" > > -#endif > > +#define PDMA_MAX_NR_CH 4 > > > > #define PDMA_BASE_ADDR 0x3000000 > > #define PDMA_CHAN_OFFSET 0x1000 > > @@ -118,7 +114,7 @@ struct sf_pdma { > > void __iomem *membase; > > void __iomem *mappedbase; > > u32 n_chans; > > - struct sf_pdma_chan chans[PDMA_NR_CH]; > > + struct sf_pdma_chan chans[PDMA_MAX_NR_CH]; > > }; > > > > #endif /* _SF_PDMA_H */