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[23.128.96.18]) by mx.google.com with ESMTP id r187si8556252pgr.87.2022.01.21.17.54.48; Fri, 21 Jan 2022 17:54:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Kl6VqFW2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381555AbiAUPVs (ORCPT + 99 others); Fri, 21 Jan 2022 10:21:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1381537AbiAUPVc (ORCPT ); Fri, 21 Jan 2022 10:21:32 -0500 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02848C06173B for ; Fri, 21 Jan 2022 07:21:32 -0800 (PST) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: detlev) with ESMTPSA id 58F371F4620F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1642778490; bh=rEq0CHRx5+CNyoOg7KVI3Tyiy+Wpy3US/1T49aS9EK4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Kl6VqFW2rFEZEKlRk5+OJ67nsrNMqYO3c0yWkpj/+0ce+haaM1IJ0i4s1hT6iqmoG cJkf4jjSyBJmTLd/cpR3NXEVmjSBipHgzfPTcAkp5fdrjNSbt55ygBP7qolmLkXyLx RBJUNAump/WwOK3F0JJdtIAfvwUWeQe2hag7OMh/583VPT3lpuzUyn8shQ6/3xfXWc t1JCru3CqwO/i/mQOi+p/B8tI6vEa6vWIZmm4e5GXxY4Rfcglyp4L+3+fYKEwE8ABB VFvlZ33S+meKkhNp9cK6QcQ9AQo0me3ogUA+hzI8AWmho+grr/tFJkjpV9yCbieJV1 GfEQMePILxdfg== From: Detlev Casanova To: linux-kernel@vger.kernel.org Cc: Dave Stevenson , Liam Girdwood , Mark Brown Subject: [PATCH v2 5/9] regulator: rpi-panel: Convert to drive lines directly Date: Fri, 21 Jan 2022 10:20:52 -0500 Message-Id: <20220121152056.2044551-6-detlev.casanova@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121152056.2044551-1-detlev.casanova@collabora.com> References: <20220121152056.2044551-1-detlev.casanova@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dave Stevenson The Atmel was doing a load of automatic sequencing of control lines, however it was combining the touch controller's reset with the bridge/panel control. Change to control the control signals directly rather than through the automatic POWERON control. Signed-off-by: Dave Stevenson --- .../regulator/rpi-panel-attiny-regulator.c | 111 ++++++++++-------- 1 file changed, 60 insertions(+), 51 deletions(-) diff --git a/drivers/regulator/rpi-panel-attiny-regulator.c b/drivers/regulator/rpi-panel-attiny-regulator.c index b3629a1e0e50..995915ca4a9b 100644 --- a/drivers/regulator/rpi-panel-attiny-regulator.c +++ b/drivers/regulator/rpi-panel-attiny-regulator.c @@ -21,11 +21,28 @@ /* I2C registers of the Atmel microcontroller. */ #define REG_ID 0x80 #define REG_PORTA 0x81 -#define REG_PORTA_HF BIT(2) -#define REG_PORTA_VF BIT(3) #define REG_PORTB 0x82 +#define REG_PORTC 0x83 #define REG_POWERON 0x85 #define REG_PWM 0x86 +#define REG_ADDR_L 0x8c +#define REG_ADDR_H 0x8d +#define REG_WRITE_DATA_H 0x90 +#define REG_WRITE_DATA_L 0x91 + +#define PA_LCD_DITHB BIT(0) +#define PA_LCD_MODE BIT(1) +#define PA_LCD_LR BIT(2) +#define PA_LCD_UD BIT(3) + +#define PB_BRIDGE_PWRDNX_N BIT(0) +#define PB_LCD_VCC_N BIT(1) +#define PB_LCD_MAIN BIT(7) + +#define PC_LED_EN BIT(0) +#define PC_RST_TP_N BIT(1) +#define PC_RST_LCD_N BIT(2) +#define PC_RST_BRIDGE_N BIT(3) struct attiny_lcd { /* lock to serialise overall accesses to the Atmel */ @@ -37,99 +54,91 @@ static const struct regmap_config attiny_regmap_config = { .reg_bits = 8, .val_bits = 8, .disable_locking = 1, - .max_register = REG_PWM, + .max_register = REG_WRITE_DATA_L, .cache_type = REGCACHE_NONE, }; static int attiny_lcd_power_enable(struct regulator_dev *rdev) { - struct mutex *lock = rdev_get_drvdata(rdev); - unsigned int data; - int ret, i; - - mutex_lock(lock); - - regmap_write(rdev->regmap, REG_POWERON, 1); - msleep(80); + struct attiny_lcd *state = rdev_get_drvdata(rdev); - /* Wait for nPWRDWN to go low to indicate poweron is done. */ - for (i = 0; i < 20; i++) { - ret = regmap_read(rdev->regmap, REG_PORTB, &data); - if (!ret) { - if (data & BIT(0)) - break; - } - usleep_range(10000, 12000); - } - usleep_range(10000, 12000); + mutex_lock(&state->lock); - if (ret) - pr_err("%s: regmap_read_poll_timeout failed %d\n", __func__, ret); + /* Ensure bridge, and tp stay in reset */ + regmap_write(rdev->regmap, REG_PORTC, 0); + usleep_range(5000, 10000); /* Default to the same orientation as the closed source * firmware used for the panel. Runtime rotation * configuration will be supported using VC4's plane * orientation bits. */ - regmap_write(rdev->regmap, REG_PORTA, BIT(2)); + regmap_write(rdev->regmap, REG_PORTA, PA_LCD_LR); + usleep_range(5000, 10000); + regmap_write(rdev->regmap, REG_PORTB, PB_LCD_MAIN); + usleep_range(5000, 10000); + /* Bring controllers out of reset */ + regmap_write(rdev->regmap, REG_PORTC, + PC_LED_EN | PC_RST_BRIDGE_N | PC_RST_LCD_N | PC_RST_TP_N); + + msleep(80); + + regmap_write(rdev->regmap, REG_ADDR_H, 0x04); + usleep_range(5000, 8000); + regmap_write(rdev->regmap, REG_ADDR_L, 0x7c); + usleep_range(5000, 8000); + regmap_write(rdev->regmap, REG_WRITE_DATA_H, 0x00); + usleep_range(5000, 8000); + regmap_write(rdev->regmap, REG_WRITE_DATA_L, 0x00); + + msleep(100); - mutex_unlock(lock); + mutex_unlock(&state->lock); return 0; } static int attiny_lcd_power_disable(struct regulator_dev *rdev) { - struct mutex *lock = rdev_get_drvdata(rdev); + struct attiny_lcd *state = rdev_get_drvdata(rdev); - mutex_lock(lock); + mutex_lock(&state->lock); regmap_write(rdev->regmap, REG_PWM, 0); - regmap_write(rdev->regmap, REG_POWERON, 0); + usleep_range(5000, 10000); + regmap_write(rdev->regmap, REG_PORTA, 0); + usleep_range(5000, 10000); + regmap_write(rdev->regmap, REG_PORTB, PB_LCD_VCC_N); + usleep_range(5000, 10000); + regmap_write(rdev->regmap, REG_PORTC, 0); msleep(30); - mutex_unlock(lock); + mutex_unlock(&state->lock); return 0; } static int attiny_lcd_power_is_enabled(struct regulator_dev *rdev) { - struct mutex *lock = rdev_get_drvdata(rdev); + struct attiny_lcd *state = rdev_get_drvdata(rdev); unsigned int data; int ret, i; - mutex_lock(lock); - - for (i = 0; i < 10; i++) { - ret = regmap_read(rdev->regmap, REG_POWERON, &data); - if (!ret) - break; - usleep_range(10000, 12000); - } - if (ret < 0) { - mutex_unlock(lock); - return ret; - } - - if (!(data & BIT(0))) { - mutex_unlock(lock); - return 0; - } + mutex_lock(&state->lock); for (i = 0; i < 10; i++) { - ret = regmap_read(rdev->regmap, REG_PORTB, &data); + ret = regmap_read(rdev->regmap, REG_PORTC, &data); if (!ret) break; usleep_range(10000, 12000); } - mutex_unlock(lock); + mutex_unlock(&state->lock); if (ret < 0) return ret; - return data & BIT(0); + return data & PC_RST_BRIDGE_N; } static const struct regulator_init_data attiny_regulator_default = { @@ -256,7 +265,7 @@ static int attiny_i2c_probe(struct i2c_client *i2c, config.regmap = regmap; config.of_node = i2c->dev.of_node; config.init_data = &attiny_regulator_default; - config.driver_data = &state->lock; + config.driver_data = state; rdev = devm_regulator_register(&i2c->dev, &attiny_regulator, &config); if (IS_ERR(rdev)) { -- 2.34.1