Received: by 2002:a05:6a10:af89:0:0:0:0 with SMTP id iu9csp3407479pxb; Mon, 24 Jan 2022 08:58:17 -0800 (PST) X-Google-Smtp-Source: ABdhPJzKewPzXBAXLc1ePHdsot+kEecerrxurU6Turelqtb0Og/V73+8j8e+NPn8g+rrI6YBlqaO X-Received: by 2002:a17:903:246:b0:14a:26ae:4e86 with SMTP id j6-20020a170903024600b0014a26ae4e86mr15690470plh.59.1643043497135; Mon, 24 Jan 2022 08:58:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1643043497; cv=none; d=google.com; s=arc-20160816; b=zdX65rN2raYvmIA8LGSF+J61jGLOGsAnkHOzoToWVGsKTvhmaQNargWiYyfPe3K1sM j3EWkm1Ok9sAf2lA6lFLLPyHHpU30F44b0R6ojSDS0w7oSJ8brTWUPhLszUYOyPjp/a7 G5lIweAtZF54BzFeqe5oEJSTzeHidkuMZQ57yqvYrLlv4xCspOYcesplaQh0w4zzMsWy k1J6SmvZrbCpnw0KgqeHgqfz/fFBWZO7zdLpQQUFcprcCtNp3O+LsixBsUFmouwzsELV nbmaowEF7RhsxJK4aR+9Kcbye4Xh4dmQYehneo3RiXLVyTaeUdAiceyWyLgbDsZJqrFR jCYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=YXMs8oGskSNB8eGSZdW5Fzr2htx7rYQEhCChIn54sWo=; b=w5jXtadoqMKvFBuUnh+VhF29gpa1McKAgXwNh2MqrEsuzU3T0tLeeueQH/8CG8WnG9 okj6+EUGdA1s2h20j1pqCad2YGrmXyyg5JuuQRC6qkASptXkIcJJEj74Xk7S64X3jhg/ F1Dhp7FSOeIB7gigGSRtae2yxW2KhEZwZO0SGQ1arByaI0zTZQ+vW2XsKX5ur2qeQ7bE kYhbIce0snust7LUHJoNC8Z5/rretLrCui8Apx1BPvfcu4IvbFwGc8zEW20ruanrgIXS xgbYDCIl2R7kO4INsdR2KldAnR7QjCUNlf/9Yux/GpoW1MHzculRu94o5vJ25CB1NmSY ynYQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=kB2EpWTx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s21si15085322pfu.287.2022.01.24.08.58.04; Mon, 24 Jan 2022 08:58:17 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=kB2EpWTx; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241348AbiAXEXz (ORCPT + 99 others); Sun, 23 Jan 2022 23:23:55 -0500 Received: from alexa-out.qualcomm.com ([129.46.98.28]:31275 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241331AbiAXEXu (ORCPT ); Sun, 23 Jan 2022 23:23:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1642998230; x=1674534230; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=YXMs8oGskSNB8eGSZdW5Fzr2htx7rYQEhCChIn54sWo=; b=kB2EpWTxNykboyFWEZ3ZhKfQcLRtenZxODe3tkukMGcHDOq0Makw8ubQ t2SWKqfpfYPXy5hdExLKOs0U5+wNCbXf0Os7FO+R6fjihWw+Truno8kcT ImwFkIYJEkWYIq5+fsx1HPfNWCJjsvLkEPdTzPxoEPM7512JACbf+kLoq 8=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 23 Jan 2022 20:23:50 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2022 20:23:49 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Sun, 23 Jan 2022 20:23:48 -0800 Received: from jprakash-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Sun, 23 Jan 2022 20:23:38 -0800 From: Jishnu Prakash To: , , , , , , , , , , , , , , , , , , "Rafael J. Wysocki" , , , CC: , , Jishnu Prakash Subject: [PATCH V4 1/4] dt-bindings: thermal: qcom: add PMIC5 Gen2 ADC_TM bindings Date: Mon, 24 Jan 2022 09:53:11 +0530 Message-ID: <1642998194-12899-2-git-send-email-quic_jprakash@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1642998194-12899-1-git-send-email-quic_jprakash@quicinc.com> References: <1642998194-12899-1-git-send-email-quic_jprakash@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add documentation for PMIC5 Gen2 ADC_TM peripheral. It is used for monitoring ADC channel thresholds for PMIC7-type PMICs. It is present on PMK8350, like PMIC7 ADC and can be used to monitor up to 8 ADC channels, from any of the PMIC7 PMICs on a target, through PBS(Programmable Boot Sequence). Signed-off-by: Jishnu Prakash Reviewed-by: Jonathan Cameron Reviewed-by: Rob Herring --- .../bindings/thermal/qcom-spmi-adc-tm5.yaml | 110 ++++++++++++++++++++- 1 file changed, 108 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml index 3ea8c0c..feb390d 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml @@ -10,7 +10,9 @@ maintainers: properties: compatible: - const: qcom,spmi-adc-tm5 + enum: + - qcom,spmi-adc-tm5 + - qcom,spmi-adc-tm5-gen2 reg: maxItems: 1 @@ -33,6 +35,7 @@ properties: qcom,avg-samples: $ref: /schemas/types.yaml#/definitions/uint32 description: Number of samples to be used for measurement. + Not applicable for Gen2 ADC_TM peripheral. enum: - 1 - 2 @@ -45,6 +48,7 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: This parameter is used to decrease ADC sampling rate. Quicker measurements can be made by reducing decimation ratio. + Not applicable for Gen2 ADC_TM peripheral. enum: - 250 - 420 @@ -93,6 +97,29 @@ patternProperties: - const: 1 - enum: [ 1, 3, 4, 6, 20, 8, 10 ] + qcom,avg-samples: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Number of samples to be used for measurement. + This property in child node is applicable only for Gen2 ADC_TM peripheral. + enum: + - 1 + - 2 + - 4 + - 8 + - 16 + default: 1 + + qcom,decimation: + $ref: /schemas/types.yaml#/definitions/uint32 + description: This parameter is used to decrease ADC sampling rate. + Quicker measurements can be made by reducing decimation ratio. + This property in child node is applicable only for Gen2 ADC_TM peripheral. + enum: + - 85 + - 340 + - 1360 + default: 1360 + required: - reg - io-channels @@ -100,6 +127,31 @@ patternProperties: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: qcom,spmi-adc-tm5 + + then: + patternProperties: + "^([-a-z0-9]*)@[0-7]$": + properties: + qcom,decimation: false + qcom,avg-samples: false + + - if: + properties: + compatible: + contains: + const: qcom,spmi-adc-tm5-gen2 + + then: + properties: + qcom,avg-samples: false + qcom,decimation: false + required: - compatible - reg @@ -124,7 +176,7 @@ examples: #size-cells = <0>; #io-channel-cells = <1>; - /* Other propreties are omitted */ + /* Other properties are omitted */ conn-therm@4f { reg = ; qcom,ratiometric; @@ -148,4 +200,58 @@ examples: }; }; }; + + - | + #include + #include + #include + spmi_bus { + #address-cells = <1>; + #size-cells = <0>; + pmk8350_vadc: adc@3100 { + reg = <0x3100>; + compatible = "qcom,spmi-adc7"; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + /* Other properties are omitted */ + xo-therm@44 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + conn-therm@47 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + }; + + pmk8350_adc_tm: adc-tm@3400 { + compatible = "qcom,spmi-adc-tm5-gen2"; + reg = <0x3400>; + interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + pmk8350-xo-therm@0 { + reg = <0>; + io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>; + qcom,decimation = <340>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + + conn-therm@1 { + reg = <1>; + io-channels = <&pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU>; + qcom,avg-samples = <2>; + qcom,ratiometric; + qcom,hw-settle-time-us = <200>; + }; + }; + }; ... -- 2.7.4