Received: by 2002:a05:6a10:af89:0:0:0:0 with SMTP id iu9csp3528392pxb; Mon, 24 Jan 2022 11:28:19 -0800 (PST) X-Google-Smtp-Source: ABdhPJy+AXupyAC8zWVTq68z3Rx6NFsm8IaHESihMT8kbFbM+zOmb94wGhvht1aRrBS7/18qiMvq X-Received: by 2002:a05:6a00:1906:b0:44c:b35d:71a8 with SMTP id y6-20020a056a00190600b0044cb35d71a8mr15158922pfi.51.1643052404080; Mon, 24 Jan 2022 11:26:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1643052404; cv=none; d=google.com; s=arc-20160816; b=ztY/4tu7yw2VJS7MLXQkRcdezvzx28JtDCKycRfaD97JSmJJhQx6ZBiH2K6DouMgdE dAtkAVKWwXuxWgUhqSH6xEXrVW7o0M6FcIHJwqvq6xoXHPHbimakjUWsOC99J3di/k11 8VkAEH9WpFmLdqw29vgoYdUFGkfKHbkoIaMLck03AnGgibJBr2IX6YJgQoz5BCsaA5U6 vZEJkvCZJCQ8EznU3eomh87mWzj36g087jik7j2M+LwH5jtT2ligO1qDZpF01N8rLc77 WnJgIIBZPMrvAaISpUojYy4vixWV2jOr3CI8ZZaPb2wAyGZXIoATtz8xTZ5sX07+4ERS hPcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=CMi3vhvtlm8g0ajnDI9R6nyxduF7d+hsjJG/tk0SeYA=; b=JaKF0gVU0g7nOecuZRfrE/ERu3fEz5lvz/C/QB9qGyACvz9qFakGT5QPx0NPAQy9Wz mHl1BbQN26jSF8pYAW2+284x1BQkouY636gtRRrwwMfhIvQ6NAF8aKcmhMDoYHBT5ftE W7MqGqr0YehSe+m9PwBINzEemCMB303OmwdyiEWqiyRPisrJykAMjb1D79zByyQBde0r BXZejOiqWIwAs/uO5ha4w/i5tMPJQ0qU9mGTC6rRmQ2CH7xOMmB+udeu4ve2cLnpLszW mEm1H2qcPqnwDEo6O0rbiKBcFfsRrvo5PHU1Usy+eMOp+bu+PNFOYdK9bHaZvPVGEkDt tj9w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s205si5348876pgs.670.2022.01.24.11.26.28; Mon, 24 Jan 2022 11:26:44 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240334AbiAXPKO (ORCPT + 99 others); Mon, 24 Jan 2022 10:10:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46642 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240244AbiAXPKO (ORCPT ); Mon, 24 Jan 2022 10:10:14 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1619DC06173B for ; Mon, 24 Jan 2022 07:10:14 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AA7126142A for ; Mon, 24 Jan 2022 15:10:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8B5ECC340E1; Mon, 24 Jan 2022 15:10:11 +0000 (UTC) From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org, Anshuman Khandual Cc: Will Deacon , Mathieu Poirier , linux-kernel@vger.kernel.org, Suzuki Poulose , coresight@lists.linaro.org Subject: Re: [PATCH V2 0/2] coresight: trbe: Update existing errata for Cortex-X2 Date: Mon, 24 Jan 2022 15:10:08 +0000 Message-Id: <164303699846.16509.8389008992406508241.b4-ty@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <1642994138-25887-1-git-send-email-anshuman.khandual@arm.com> References: <1642994138-25887-1-git-send-email-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 24 Jan 2022 08:45:36 +0530, Anshuman Khandual wrote: > Errata ARM64_ERRATUM_[2119858|2224489] also affect some Cortex-X2 ranges as > well. This series updates the errata definition and detection as required. > This series applies on v5.17-rc1. > > Relevant identification document can be found here. > > https://developer.arm.com/documentation/101803/0200/AArch64-system-registers/ > AArch64-identification-register-summary/MIDR-EL1--Main-ID-Register > > [...] Applied to arm64 (for-next/fixes), thanks! [1/2] arm64: Add Cortex-X2 CPU part definition https://git.kernel.org/arm64/c/72bb9dcb6c33 [2/2] arm64: errata: Update ARM64_ERRATUM_[2119858|2224489] with Cortex-X2 ranges https://git.kernel.org/arm64/c/eb30d838a44c -- Catalin