Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750959AbXBFLNL (ORCPT ); Tue, 6 Feb 2007 06:13:11 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751041AbXBFLNL (ORCPT ); Tue, 6 Feb 2007 06:13:11 -0500 Received: from ug-out-1314.google.com ([66.249.92.175]:9212 "EHLO ug-out-1314.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750959AbXBFLNH (ORCPT ); Tue, 6 Feb 2007 06:13:07 -0500 DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=beta; h=received:message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:references; b=sY0++NGnEs9HtFsoSL1P8c1VmFn+QrlbCvfuguNgrg87DaoM1vJjnYvIE571f1cLIUK083kNUKfb8TNCs32ocFSxtfJGr8mlLjdIig9/KCNHNb7X2SQt83JLJhut7bDTFWorEmQBrdVExVf2+O2LGl+EyDuWXvchUuEPMuRzGXg= Message-ID: <1a297b360702060313n34a8f941oebf9f373630b070f@mail.gmail.com> Date: Tue, 6 Feb 2007 15:13:04 +0400 From: "Manu Abraham" To: "Grant Grundler" Subject: Re: 2.6.20 PCI Cannot allocate resource region 2 Cc: "Andrew Morton" , linux-kernel@vger.kernel.org, linux-pci@atrey.karlin.mff.cuni.cz, greg@kroah.com In-Reply-To: <20070206084638.GB20752@colo.lackof.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_4235_32126038.1170760384954" References: <1a297b360702041709l3b0309c7y8fcd33df1d487889@mail.gmail.com> <20070206045528.GA4228@colo.lackof.org> <20070206050331.GB4228@colo.lackof.org> <20070205213339.80239a22.akpm@linux-foundation.org> <20070206084638.GB20752@colo.lackof.org> Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 34482 Lines: 486 ------=_Part_4235_32126038.1170760384954 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline On 2/6/07, Grant Grundler wrote: > On Mon, Feb 05, 2007 at 09:33:39PM -0800, Andrew Morton wrote: > > On Mon, 5 Feb 2007 22:03:31 -0700 Grant Grundler wrote: > > > > > On Mon, Feb 05, 2007 at 09:55:28PM -0700, Grant Grundler wrote: > > > ... > > > > > Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- > > > > > Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- SERR+ > > > > Latency: 0, Cache Line Size 0c > > > > > BIST is running > > > > > > > > BIST is required to complete in 2 seconds. Either with success or failure. > > > > I expect BIOS to have complained before launching grub/lilo. > > > > > > Gregkh, > > > I just realized linux-pci bus scan should ignore devices (print a warning) > > > which have BIST set. Want a patch for this? > > > > > > Slight risk some previously "working" device which violates the > > > spec might get ignored...but I hope there aren't too many of those. > > > > Should we wait two seconds before declaring the device dead? > > To see whether it will come back? > > Hrm...my thought was BIOS should already be doing that...but I just > realised 2 seconds have elapsed if Manu can collect "lspci" output showing > "BIST is running". I think the fact that BIST is not "running" in the > 2.6.20-rc7 lspci output is just coincidental. The config space for that > device is full of similar garbage in both cases regardless how long > it took. > > Maybe BIOS is clobbering BIST when writing latency timer or cacheline size > register and BIOS is not being careful to clear or disable the other > bytes in that same 32-bit word? > > PCI is by nature a 32-bit wide config space and "byte enables" > are used to mask off bytes we want to ignore. If the chipset > or BIOS config access routines aren't careful, they could accidentally > modify other values in the same 32-bit word when only one byte was > intended to be changed. > > The code in pci_set_cacheline_size() uses byte enables but is only > called by pci_set_mwi(). 82 different .c files (124 instances) access > PCI_LATENCY_TIMER. Of those, 68 are pci_write_config_byte() calls. > But I really only care about the calls what would apply get invoked > for 1822:4e35. My guess is this one always gets invoked: > ./arch/i386/pci/i386.c: pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); > > since the offending device is "Mantis DTV PCI Bridge Controller [Ver 1.0]". > (http://pci-ids.ucw.cz/iii/?i=1822) > pci_enable_bridges() -> pci_set_master() -> pcibios_set_master(). > > Manu, can you add code to pci_enable_bridges() to dump information about > which bridges are getting enabled _before_ pci_set_master() is called? > > I'm interested in a hex dump of the first 8 32-bit words of > PCI config space for each device. > attaching a dump of the regs (on 2.6.17.7) as well as the diff regards, manu ------=_Part_4235_32126038.1170760384954 Content-Type: text/plain; name=dmesg.txt; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: base64 X-Attachment-Id: f_exu8gf3y Content-Disposition: attachment; filename="dmesg.txt" WzE3MTc5NTY5LjE4NDAwMF0gTGludXggdmVyc2lvbiAyLjYuMTcuNyAocm9vdEB0ZXN0Ym94KSAo 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