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From:   Kohei Tarumizu <tarumizu.kohei@fujitsu.com>
To:     catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de,
        mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
        x86@kernel.org, hpa@zytor.com,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc:     tarumizu.kohei@fujitsu.com
Subject: [PATCH 8/8] docs: ABI: Add sysfs documentation interface of hardware prefetch control driver
Date:   Tue, 25 Jan 2022 16:14:14 +0900
Message-Id: <20220125071414.811344-9-tarumizu.kohei@fujitsu.com>
In-Reply-To: <20220125071414.811344-1-tarumizu.kohei@fujitsu.com>
References: <20220125071414.811344-1-tarumizu.kohei@fujitsu.com>
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This describes the sysfs interface implemented on the hardware prefetch
control driver.

Signed-off-by: Kohei Tarumizu <tarumizu.kohei@fujitsu.com>
---
 .../ABI/testing/sysfs-devices-system-cpu      | 93 +++++++++++++++++++
 1 file changed, 93 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
index 61f5676a7429..66b4023b2ed1 100644
--- a/Documentation/ABI/testing/sysfs-devices-system-cpu
+++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
@@ -681,3 +681,96 @@ Description:
 		(RO) the list of CPUs that are isolated and don't
 		participate in load balancing. These CPUs are set by
 		boot parameter "isolcpus=".
+
+What:		/sys/devices/system/cpu/cpu*/cache/index[0,2]/prefetch_control
+Date:		January 2022
+Contact:	Linux kernel mailing list <linux-kernel@vger.kernel.org>
+Description:	Parameters for CPU's hardware prefetch control
+
+		This sysfs interface provides Hardware Prefetch control
+		attribute file by using implementation defined registers.
+		This file exists in every CPU's cache/index[0,2] directory.
+		Each attribute file corresponds to the cache level of the
+		parent index directory.
+
+		prefetch_control: (RW) This file allows user to control
+		several options described below. Which options are available
+		depends on the CPU.
+
+		  * hardware_prefetcher_enable:
+		    The enablement status of prefetcher, "enable" or "disable".
+
+		  * ip_prefetcher_enable:
+		    The enablement status of prefetcher, "enable" or "disable".
+
+		  * adjacent_cache_line_prefetcher_enable:
+		    The enablement status of prefetcher, "enable" or "disable".
+
+		  * stream_detect_prefetcher_enable:
+		    The enablement status of prefetcher, "enable" or "disable".
+
+		  * stream_detect_prefetcher_strong:
+		    The strongness status of prefetcher, "strong" or "weak".
+
+		  * stream_detect_prefetcher_dist:
+		    The current prefetcher distance value in bytes or the "auto".
+		    This value is a multiples of a specific value, depending on
+		    the CPU.
+
+		    Write either a value in byte or the string "auto" to this
+		    parameter. If you write a value less than multiples of a
+		    specific value, it is rounded up.
+
+		- Supported processors
+
+		    This sysfs interface is available on several processors, x86
+		    and ARM64. Currently, the following processors are supported:
+
+			- x86 processor
+			    - INTEL_FAM6_BROADWELL_X
+
+			- ARM64 processor
+			    - FUJITSU_CPU_PART_A64FX
+
+		- Attribute mapping
+
+		    Some Intel processors have MSR 0x1a4. This register has several
+		    specifications depending on the model. This interface provides
+		    a one-to-one option to control all the tunable parameters the
+		    CPU provides of the following.
+
+			- "* Hardware Prefetcher Disable (R/W)"
+			    corresponds to the attribute "hardware_prefetcher_enable"
+
+			- "* Adjacent Cache Line Prefetcher Disable (R/W)"
+			    corresponds to the attribute "adjacent_cache_line_prefetcher_enable"
+
+			- "* IP Prefetcher Disable (R/W)"
+			    corresponds to the attribute "ip_prefetcher_enable"
+
+		    The processor A64FX has register IMP_PF_STREAM_DETECT_CTRL_EL0
+		    for Hardware Prefetch Control. This attribute maps each
+		    specification to the following.
+
+			- "L*PF_DIS": enablement of hardware prefetcher
+			    corresponds to the attribute "stream_detect_prefetcher_enable"
+
+			- "L*W": strongness of hardware prefetcher
+			    corresponds to the attribute "stream_detect_prefetcher_strong"
+
+			- "L*_DIST": distance of hardware prefetcher
+			    corresponds to the attribute "stream_detect_prefetcher_dist"
+
+		- Example::
+
+		    # cat /sys/devices/system/cpu/cpu0/cache/index0/prefetch_control
+
+		    > hardware_prefetcher_enable=enable
+		    > ip_prefetcher_enable=enable
+
+		    # echo "hardware_prefetcher_enable=disable" > /sys/devices/system/cpu/cpu0/cache/index0/prefetch_control
+
+		    # cat /sys/devices/system/cpu/cpu0/cache/index2/prefetch_control
+
+		    > hardware_prefetcher_enable=disable
+		    > ip_prefetcher_enable=enable
-- 
2.27.0