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[23.128.96.18]) by mx.google.com with ESMTP id l5si10514622ejo.973.2022.01.25.06.54.11; Tue, 25 Jan 2022 06:54:37 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@bgdev-pl.20210112.gappssmtp.com header.s=20210112 header.b=AUsbUFpv; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352682AbiAYKaW (ORCPT + 99 others); Tue, 25 Jan 2022 05:30:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345310AbiAYKVQ (ORCPT ); Tue, 25 Jan 2022 05:21:16 -0500 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C4DAC061771 for ; Tue, 25 Jan 2022 02:21:13 -0800 (PST) Received: by mail-ej1-x634.google.com with SMTP id p15so29533292ejc.7 for ; Tue, 25 Jan 2022 02:21:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bgdev-pl.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=v30D70OPLVtNvFxgkZp8dWGqr6GnI2jw20wYyawnuRI=; b=AUsbUFpvHTKDZX3ZukbLUoAGTJSi9S6T4AQCEsSPtBYGHVZflIPIZw/zkNiiN1exep MnpRX2vHE7sy5EBCo71VGSAagsa2XC38QHM3OTYb7cWIuNiWchdFa80d1CjtvJKI1FQa e7pw4XA5DaDfsIUnh6r+TV8keYnrvDYFVT33+Y9Mm4AK09mrWO0pLzu71g9sHsBYmM8N j+AG6Wdy/7M3tOhaR5rPZ7WOTopxQ2I8iC/VpYFYyhx1hGHiacj0YnrDgdAU3wLviJHF eXuveFyWkQcA/ZuKsfVscVx0/TVJe0+geQjASwzW+4ZYvqI5oAFNQPMU95KKFJClVLOg WfoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=v30D70OPLVtNvFxgkZp8dWGqr6GnI2jw20wYyawnuRI=; b=bP8HlE5eywLkCjweP0HQK7rLuyPgGM5sLx8TIFiLugW2i84tnl8oHZX7rf1BXDF1af 73d+9tONU6QlzntnohNoveyfMaVo/xB/xMVEmdxwGxrgrADSmynPcoHsu7VX+KNE4Pgo ALiO5r/jw2qJTCxN3OW0Mpom4EFEpRPMrob/p7P/8xl8H+a2tPdkQNC5BRH4N1pl4GNO p7q2x/mbqpOWjeIxPA1htyeex43idC5KobeQsOPGYMpwD2t+wHOxOLWBPdH0jrPrOhEA pby8gy2hXl9QboV6HLfrPipSGsRxkutAvcYlWMJuUZi37wzPP0k6aCd0J2ComDEU0A5N p0tA== X-Gm-Message-State: AOAM5334WyG8tALoUkUp8VtYligtu/F2snjP8ygHiOj0CeoXt3RKPp5/ nlcdLREomaqyjZ4diIP6bR8fev3ltnl759hQ6Jzigg== X-Received: by 2002:a17:906:cc84:: with SMTP id oq4mr16696651ejb.736.1643106071794; Tue, 25 Jan 2022 02:21:11 -0800 (PST) MIME-Version: 1.0 References: <20220120070226.1492-1-biao.huang@mediatek.com> <20220120070226.1492-4-biao.huang@mediatek.com> In-Reply-To: <20220120070226.1492-4-biao.huang@mediatek.com> From: Bartosz Golaszewski Date: Tue, 25 Jan 2022 11:21:01 +0100 Message-ID: Subject: Re: [PATCH net-next v1 3/9] net: ethernet: mtk-star-emac: add support for MT8365 SoC To: Biao Huang Cc: David Miller , Rob Herring , Fabien Parent , Jakub Kicinski , Felix Fietkau , John Crispin , Sean Wang , Mark Lee , Matthias Brugger , netdev , devicetree , Linux Kernel Mailing List , Linux ARM , "moderated list:ARM/Mediatek SoC..." , Yinghua Pan , srv_heupstream@mediatek.com, Macpaul Lin Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 20, 2022 at 8:02 AM Biao Huang wrote: > > Add Ethernet driver support for MT8365 SoC. > > Signed-off-by: Biao Huang > Signed-off-by: Yinghua Pan > Signed-off-by: Fabien Parent > --- > drivers/net/ethernet/mediatek/mtk_star_emac.c | 75 ++++++++++++++++--- > 1 file changed, 64 insertions(+), 11 deletions(-) > > diff --git a/drivers/net/ethernet/mediatek/mtk_star_emac.c b/drivers/net/ethernet/mediatek/mtk_star_emac.c > index 7c2af775d601..403439782db9 100644 > --- a/drivers/net/ethernet/mediatek/mtk_star_emac.c > +++ b/drivers/net/ethernet/mediatek/mtk_star_emac.c > @@ -151,6 +151,7 @@ static const char *const mtk_star_clk_names[] = { "core", "reg", "trans" }; > #define MTK_STAR_REG_MAC_CLK_CONF 0x00ac > #define MTK_STAR_MSK_MAC_CLK_CONF GENMASK(7, 0) > #define MTK_STAR_BIT_CLK_DIV_10 0x0a > +#define MTK_STAR_BIT_CLK_DIV_50 0x32 > > /* Counter registers. */ > #define MTK_STAR_REG_C_RXOKPKT 0x0100 > @@ -183,9 +184,11 @@ static const char *const mtk_star_clk_names[] = { "core", "reg", "trans" }; > #define MTK_STAR_REG_C_RX_TWIST 0x0218 > > /* Ethernet CFG Control */ > -#define MTK_PERICFG_REG_NIC_CFG_CON 0x03c4 > -#define MTK_PERICFG_MSK_NIC_CFG_CON_CFG_MII GENMASK(3, 0) > -#define MTK_PERICFG_BIT_NIC_CFG_CON_RMII BIT(0) > +#define MTK_PERICFG_REG_NIC_CFG0_CON 0x03c4 > +#define MTK_PERICFG_REG_NIC_CFG1_CON 0x03c8 > +#define MTK_PERICFG_REG_NIC_CFG_CON_V2 0x0c10 > +#define MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF GENMASK(3, 0) > +#define MTK_PERICFG_BIT_NIC_CFG_CON_RMII 1 > > /* Represents the actual structure of descriptors used by the MAC. We can > * reuse the same structure for both TX and RX - the layout is the same, only > @@ -234,6 +237,7 @@ struct mtk_star_ring { > }; > > struct mtk_star_compat { > + int (*set_interface_mode)(struct net_device *ndev); > unsigned char bit_clk_div; > }; > > @@ -909,13 +913,6 @@ static void mtk_star_init_config(struct mtk_star_priv *priv) > priv->compat_data->bit_clk_div); > } > > -static void mtk_star_set_mode_rmii(struct mtk_star_priv *priv) > -{ > - regmap_update_bits(priv->pericfg, MTK_PERICFG_REG_NIC_CFG_CON, > - MTK_PERICFG_MSK_NIC_CFG_CON_CFG_MII, > - MTK_PERICFG_BIT_NIC_CFG_CON_RMII); > -} > - > static int mtk_star_enable(struct net_device *ndev) > { > struct mtk_star_priv *priv = netdev_priv(ndev); > @@ -1531,7 +1528,13 @@ static int mtk_star_probe(struct platform_device *pdev) > return -ENODEV; > } > > - mtk_star_set_mode_rmii(priv); > + if (priv->compat_data->set_interface_mode) { > + ret = priv->compat_data->set_interface_mode(ndev); > + if (ret) { > + dev_err(dev, "Failed to set phy interface, err = %d\n", ret); > + return -EINVAL; > + } > + } Shouldn't you still call mtk_star_set_mode_rmii(priv) if there's no callback? > > ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); > if (ret) { > @@ -1564,10 +1567,58 @@ static int mtk_star_probe(struct platform_device *pdev) > return devm_register_netdev(dev, ndev); > } > > +static int mt8516_set_interface_mode(struct net_device *ndev) > +{ > + struct mtk_star_priv *priv = netdev_priv(ndev); > + struct device *dev = mtk_star_get_dev(priv); > + unsigned int intf_val = 0; No need to initialize. > + > + switch (priv->phy_intf) { > + case PHY_INTERFACE_MODE_RMII: > + intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII; > + break; > + default: > + dev_err(dev, "This interface not supported\n"); > + return -EINVAL; > + } > + > + regmap_update_bits(priv->pericfg, MTK_PERICFG_REG_NIC_CFG0_CON, > + MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF, > + intf_val); > + return 0; You can directly return regmap_update_bits(). > +} > + > +static int mt8365_set_interface_mode(struct net_device *ndev) > +{ > + struct mtk_star_priv *priv = netdev_priv(ndev); > + struct device *dev = mtk_star_get_dev(priv); > + unsigned int intf_val = 0; > + > + switch (priv->phy_intf) { > + case PHY_INTERFACE_MODE_RMII: > + intf_val = MTK_PERICFG_BIT_NIC_CFG_CON_RMII; > + break; > + default: > + dev_err(dev, "This interface not supported\n"); > + return -EINVAL; > + } > + > + regmap_update_bits(priv->pericfg, MTK_PERICFG_REG_NIC_CFG_CON_V2, > + MTK_PERICFG_REG_NIC_CFG_CON_CFG_INTF, > + intf_val); > + return 0; > +} Same as above. > + > static struct mtk_star_compat mtk_star_mt8516_compat = { > + .set_interface_mode = mt8516_set_interface_mode, > .bit_clk_div = MTK_STAR_BIT_CLK_DIV_10, > }; > > +static struct mtk_star_compat mtk_star_mt8365_compat = { > + .set_interface_mode = mt8365_set_interface_mode, > + .bit_clk_div = MTK_STAR_BIT_CLK_DIV_50, > +}; > + > static const struct of_device_id mtk_star_of_match[] = { > { .compatible = "mediatek,mt8516-eth", > .data = &mtk_star_mt8516_compat }, > @@ -1575,6 +1626,8 @@ static const struct of_device_id mtk_star_of_match[] = { > .data = &mtk_star_mt8516_compat }, > { .compatible = "mediatek,mt8175-eth", > .data = &mtk_star_mt8516_compat }, > + { .compatible = "mediatek,mt8365-eth", > + .data = &mtk_star_mt8365_compat }, > { } > }; > MODULE_DEVICE_TABLE(of, mtk_star_of_match); > -- > 2.25.1 > Bart