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[209.85.222.41]) by smtp.gmail.com with ESMTPSA id e17sm605735vsl.21.2022.01.25.06.24.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 25 Jan 2022 06:24:07 -0800 (PST) Received: by mail-ua1-f41.google.com with SMTP id y4so37695300uad.1; Tue, 25 Jan 2022 06:24:07 -0800 (PST) X-Received: by 2002:a05:6102:34e:: with SMTP id e14mr644513vsa.68.1643120647054; Tue, 25 Jan 2022 06:24:07 -0800 (PST) MIME-Version: 1.0 References: <20220110134659.30424-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20220110134659.30424-11-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Tue, 25 Jan 2022 15:23:55 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 10/12] arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC To: Rob Herring Cc: Lad Prabhakar , Linux-Renesas , Magnus Damm , Biju Das , Prabhakar , Linux Kernel Mailing List , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On Tue, Jan 25, 2022 at 3:00 PM Rob Herring wrote: > On Mon, Jan 10, 2022 at 7:47 AM Lad Prabhakar > wrote: > > From: Biju Das > > > > The RZ/V2L is package- and pin-compatible with the RZ/G2L. The only > > difference being the RZ/V2L SoC has additional DRP-AI IP (AI > > accelerator). > > > > Add initial DTSI for RZ/V2L SoC with below SoC specific dtsi files for > > supporting single core and dual core devices. > > > > r9a07g054l1.dtsi => RZ/V2L R9A07G054L1 SoC specific parts > > r9a07g054l2.dtsi => RZ/V2L R9A07G054L2 SoC specific parts > > > > Both RZ/G2L and RZ/V2L SMARC EVK SoM are identical apart from SoC's > > used hence the common dtsi files (rzg2l-smarc*.dtsi) are share between > > RZ/G2L and RZ/V2L SMARC EVK. Place holders are added in device nodes to > > avoid compilation errors for the devices which have not been enabled yet > > on RZ/V2L SoC. > > > > Signed-off-by: Biju Das > > Signed-off-by: Lad Prabhakar > > --- /dev/null > > +++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi > > @@ -0,0 +1,491 @@ > > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +/* > > + * Device Tree Source for the RZ/V2L SoC > > + * > > + * Copyright (C) 2021 Renesas Electronics Corp. > > + */ > > + > > +#include > > +#include > > linux-next is failing because this header is missing: > > In file included from arch/arm64/boot/dts/renesas/r9a07g054l2.dtsi:9, > from arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts:9: > arch/arm64/boot/dts/renesas/r9a07g054.dtsi:9:10: fatal error: > dt-bindings/clock/r9a07g054-cpg.h: No such file or directory > 9 | #include > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Thanks, I have already removed the offending commits from renesas-next. as the header is not ready yet. Interestingly, kernel test robot reported a success for that branch... Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds