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Subject: Re: [PATCH v3 11/15] dt-bindings: clock: add ipq8064 ce5 clk define
From:   Stephen Boyd <sboyd@kernel.org>
To:     Andy Gross <agross@kernel.org>,
        Ansuel Smith <ansuelsmth@gmail.com>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Taniya Das <tdas@codeaurora.org>, devicetree@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org
Date:   Tue, 25 Jan 2022 12:47:26 -0800
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Message-Id: <20220125204727.D3BC8C340E0@smtp.kernel.org>
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Quoting Ansuel Smith (2022-01-21 13:03:36)
> Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver.
>=20
> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> ---
>  include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>=20
> diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bi=
ndings/clock/qcom,gcc-ipq806x.h
> index 7deec14a6dee..02262d2ac899 100644
> --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
> @@ -240,7 +240,7 @@
>  #define PLL14                                  232
>  #define PLL14_VOTE                             233
>  #define PLL18                                  234
> -#define CE5_SRC                                        235
> +#define CE5_A_CLK                              235

Technically this is ABI and changing it is bad. I see that CE5_SRC isn't
used though so I guess it's OK.

>  #define CE5_H_CLK                              236
>  #define CE5_CORE_CLK                           237
>  #define CE3_SLEEP_CLK                          238
> @@ -283,5 +283,8 @@
>  #define EBI2_AON_CLK                           281
>  #define NSSTCM_CLK_SRC                         282
>  #define NSSTCM_CLK                             283
> +#define CE5_A_CLK_SRC                          285
> +#define CE5_H_CLK_SRC                          286
> +#define CE5_CORE_CLK_SRC                       287