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Date:   Wed, 26 Jan 2022 23:38:21 +0100
From:   Michael Walle <michael@walle.cc>
To:     Chen-Tsung Hsieh <chentsung@chromium.org>
Cc:     Tudor Ambarus <tudor.ambarus@microchip.com>,
        Pratyush Yadav <p.yadav@ti.com>,
        Miquel Raynal <miquel.raynal@bootlin.com>,
        Richard Weinberger <richard@nod.at>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org
Subject: Re: [RESEND PATCH] mtd: spi-nor: core: Check written SR value in
 spi_nor_write_16bit_sr_and_check()
In-Reply-To: <20220126073227.3401275-1-chentsung@chromium.org>
References: <20220126073227.3401275-1-chentsung@chromium.org>
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Message-ID: <8625876c695685fc5409997403130194@walle.cc>
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Am 2022-01-26 08:32, schrieb Chen-Tsung Hsieh:
> Read back Status Register 1 to ensure that the written byte match the
> received value and return -EIO if read back test failed.
> 
> Without this patch, spi_nor_write_16bit_sr_and_check() only check the
> second half of the 16bit. It causes errors like spi_nor_sr_unlock()
> return success incorrectly when spi_nor_write_16bit_sr_and_check()
> doesn't write SR successfully.
> 
> Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on 
> lock()/unlock()")
> Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org>

Looks good to me. spi_nor_write_16bit_cr_and_check() also checks
the SR1 and the function doc also mentions it will check it - although
it doesn't.

Reviewed-by: Michael Walle <michael@walle.cc>

Out of curiosity, on what flash did you discover this?

-michael