Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
MIME-Version: 1.0
References: <20220127010023.3169415-1-pgwipeout@gmail.com> <20220127010023.3169415-3-pgwipeout@gmail.com>
 <e2479729-154a-122f-f2e0-89b62ffe2c8d@gmail.com>
In-Reply-To: <e2479729-154a-122f-f2e0-89b62ffe2c8d@gmail.com>
From:   Peter Geis <pgwipeout@gmail.com>
Date:   Thu, 27 Jan 2022 04:52:49 -0500
Message-ID: <CAMdYzYrKjVvXHftaJDyOv6MwjEwmvwgMnzZK4gm0+D=XuA+ijg@mail.gmail.com>
Subject: Re: [PATCH 2/3] arm64: dts: rockchip: add Quartz64-A pmu_io_domains
To:     Johan Jonker <jbx6244@gmail.com>
Cc:     Rob Herring <robh+dt@kernel.org>, Heiko Stuebner <heiko@sntech.de>,
        devicetree <devicetree@vger.kernel.org>,
        arm-mail-list <linux-arm-kernel@lists.infradead.org>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@lists.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

On Thu, Jan 27, 2022 at 12:57 AM Johan Jonker <jbx6244@gmail.com> wrote:
>
> Hi Peter,

Good Morning,

The Rockchip schematics IO Power Domain Map is rarely *if ever* 100%
accurate, you need to check the actual schematic for ground truth.

>
> On 1/27/22 02:00, Peter Geis wrote:
> > Several io power domains on the Quartz64-A operate at 1.8v.
> > Add the pmu_io_domains definition to enable support for this.
> > This permits the enablement of the following features:
> > sdio - wifi support
> > sdhci - mmc-hs200-1_8v
> >
> > Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> > ---
> >  arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 13 +++++++++++++
> >  1 file changed, 13 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> > index d9eb92d59099..33c2c18caaa9 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
> > @@ -482,6 +482,19 @@ vcc_sd_h: vcc-sd-h {
> >       };
> >  };
> >
>
> https://files.pine64.org/doc/quartz64/Quartz64_model-A_schematic_v2.0_20210427.pdf
>
> Could you check with the IO Power Domain Map?
>
> > +&pmu_io_domains {
> > +     pmuio1-supply = <&vcc3v3_pmu>;
> VCC3V3_PMU
>
> > +     pmuio2-supply = <&vcc3v3_pmu>;
> VCC3V3_PMU
>
> > +     vccio1-supply = <&vccio_acodec>;
> VCCIO_ACODEC
>
> > +     vccio2-supply = <&vcc_1v8>;
> VCC_1V8
>
> > +     vccio3-supply = <&vccio_sd>;
> VCCIO_SD
>
> > +     vccio4-supply = <&vcc_1v8>;
> ==> VCC1V8_PMU

Page 16 of the schematic, VCCIO4 is tied to VCC_1V8 via R1519

>
> > +     vccio5-supply = <&vcc_3v3>;
> ==> VCC_1V8

Page 20 of the schematic, VCCIO5 is tied to VCC_3V3 via R1800

>
> > +     vccio6-supply = <&vcc1v8_dvp>;
> VCC1V8_DVP
>
> > +     vccio7-supply = <&vcc_3v3>;
> VCC_3V3
>
> > +     status = "okay";
> > +};
> > +
> >  &sdhci {
> >       bus-width = <8>;
> >       mmc-hs200-1_8v;

Thanks for double checking,
Peter