Received: by 2002:a05:6a10:af89:0:0:0:0 with SMTP id iu9csp6359551pxb; Thu, 27 Jan 2022 12:04:33 -0800 (PST) X-Google-Smtp-Source: ABdhPJzcyShfwzQGl/Mrw9f07h3H/4YHg/Z813L/j/m+u2VvN8n9avJ4dfF7Lx+PBxvd6Jgb74yt X-Received: by 2002:a17:903:188:: with SMTP id z8mr4625795plg.61.1643313873627; Thu, 27 Jan 2022 12:04:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1643313873; cv=none; d=google.com; s=arc-20160816; b=GjYfNPvD+ebd/zu4Y+TMyzmVnZx7rf1FPJolBzTyjPQ/YsteEGYNK+MBsQG3s55JmA l66cf5ZUreCdm3vau/kLj04sup7CGfwESQaHqeHqLZD9N+lV2as8hvIbIohwlmwqtxCc czNhXILiJCKzUsWkl0oMbKYQE7lLmMLzp8i4HkkMViKmhymw0O4thahM9kIforRXJm5k aNcP/IzHKkXYSk4WRTL6DMEPLesrtxJve/l91Yt9j7pWiyV4EkJogbE+hU3JszO7W00C gl8tydhId/lRoUaX7dfo2+hUDo/M0Yv4mSpHcLNy/vWpl0wh6vWzfAO0mwQe7eyEqL4z r2Zw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=DmseJFhKoz+G6XWTVoLMU5szviO9uJbhum7GhArXeJQ=; b=oZeGtgijlfntWVvQvL7xuTVnKKLSF0YIcSM1uj5RnsyP5oIJbaKWFC7vFX/M0lv25C TiRJ9w6KM/sSA7FVQAn81nZb5DQ8J51fJU3s7NXxydv7xYBBYhjGVUh1M2s2iveNnTxM mxgygy3oTBC5J52lVeeS4p+nf+RrR4Y6uMf4b3zlLeT4jTOFcZppntH0f14oov24QVGQ ELiIlyrymfeCmOaeY/nTgOojdZ46b5sxm4l1YJ2jmRXaQ9sWT+hWVIegpvOz/6HhZ/iC kIcBESC16ANFcMe9HUiUy5EYGoKlc/yOH0lrCokdD2EHalitjqrYV8HWOxOcBs9gA+jb HBMQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f21si3359395pfe.317.2022.01.27.12.04.20; Thu, 27 Jan 2022 12:04:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240663AbiA0LnL (ORCPT + 99 others); Thu, 27 Jan 2022 06:43:11 -0500 Received: from mailgw01.mediatek.com ([60.244.123.138]:33306 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S240666AbiA0LnK (ORCPT ); Thu, 27 Jan 2022 06:43:10 -0500 X-UUID: a8193240ab8547b0a76e0344327fdd2b-20220127 X-UUID: a8193240ab8547b0a76e0344327fdd2b-20220127 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 410029040; Thu, 27 Jan 2022 19:43:05 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Thu, 27 Jan 2022 19:43:04 +0800 Received: from mszsdaap41.gcn.mediatek.inc (10.16.6.141) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 27 Jan 2022 19:43:03 +0800 From: To: , , , , CC: , , , , , , xinlei lee Subject: [v1,1/3] dt-bindings: display: mediatek: dsi: add documentation for MT8186 SoC Date: Thu, 27 Jan 2022 19:42:51 +0800 Message-ID: <1643283773-7081-2-git-send-email-xinlei.lee@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1643283773-7081-1-git-send-email-xinlei.lee@mediatek.com> References: <1643283773-7081-1-git-send-email-xinlei.lee@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: xinlei lee Add binding documentation for the MT8186 SoC. Signed-off-by: Xinlei Lee --- Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index 36b0145..c82b8b2 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -7,7 +7,7 @@ channel output. Required properties: - compatible: "mediatek,-dsi" -- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183. +- the supported chips are mt2701, mt7623, mt8167, mt8173, mt8183 and mt8186. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks -- 2.6.4