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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2022 20:41:44.0150 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d12171fa-50f5-42ca-da3a-08d9e1d56e27 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT063.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4080 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move the DRAM limit check into a separate helper function. Signed-off-by: Yazen Ghannam --- Link: https://lore.kernel.org/r/20211028175728.121452-13-yazen.ghannam@amd.com v3->v4: * Include pr_debug() on failure. v2->v3: * Was patch 13 in v2. v1->v2: * Moved from arch/x86 to EDAC. drivers/edac/amd64_edac.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index da2d0d9ce406..139dca3a3ba4 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1326,10 +1326,20 @@ static int add_base_and_hole(struct addr_ctx *ctx) return 0; } -static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) +static int addr_over_limit(struct addr_ctx *ctx) { - u64 dram_limit_addr; + u64 dram_limit_addr = ((ctx->reg_limit_addr & GENMASK_ULL(31, 12)) << 16) + | GENMASK_ULL(27, 0); + + /* Is calculated system address above DRAM limit address? */ + if (ctx->ret_addr > dram_limit_addr) + return -EINVAL; + + return 0; +} +static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) +{ struct addr_ctx ctx; if (!df_ops) { @@ -1365,8 +1375,6 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr goto out_err; } - dram_limit_addr = ((ctx.reg_limit_addr & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0); - if (add_base_and_hole(&ctx)) { pr_debug("Failed to add DRAM base address and hole"); goto out_err; @@ -1377,9 +1385,10 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr goto out_err; } - /* Is calculated system address is above DRAM limit address? */ - if (ctx.ret_addr > dram_limit_addr) + if (addr_over_limit(&ctx)) { + pr_debug("Calculated address is over limit"); goto out_err; + } *sys_addr = ctx.ret_addr; return 0; -- 2.25.1