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Date:   Fri, 28 Jan 2022 17:49:13 +0200
From:   Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To:     Jan =?utf-8?B?RMSFYnJvxZs=?= <jsd@semihalf.com>
Cc:     Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        linux-i2c <linux-i2c@vger.kernel.org>,
        Jarkko Nikula <jarkko.nikula@linux.intel.com>,
        Mika Westerberg <mika.westerberg@linux.intel.com>,
        Hans de Goede <hdegoede@redhat.com>,
        Wolfram Sang <wsa@kernel.org>,
        Raul E Rangel <rrangel@chromium.org>,
        Marcin Wojtas <mw@semihalf.com>,
        Grzegorz Jaszczyk <jaz@semihalf.com>, upstream@semihalf.com,
        Tom Lendacky <thomas.lendacky@amd.com>,
        "Deucher, Alexander" <alexander.deucher@amd.com>,
        "Easow, Nimesh" <Nimesh.Easow@amd.com>,
        "Limonciello, Mario" <mario.limonciello@amd.com>,
        kernel test robot <lkp@intel.com>
Subject: Re: [PATCH v2 2/2] i2c: designware: Add AMD PSP I2C bus support
Message-ID: <YfQQeWdciv/JtqLD@smile.fi.intel.com>
References: <20220120001621.705352-2-jsd@semihalf.com>
 <20220128144811.783279-1-jsd@semihalf.com>
 <20220128144811.783279-3-jsd@semihalf.com>
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On Fri, Jan 28, 2022 at 03:59:40PM +0100, Jan Dąbroś wrote:
> Hi,
> 
> Adding proper Andy's email address (and removing wrong one) in the
> whole patchset. Sorry for noise!

Thanks!

> pt., 28 sty 2022 o 15:48 Jan Dabros <jsd@semihalf.com> napisał(a):
> >
> > Implement an I2C controller sharing mechanism between the host (kernel)
> > and PSP co-processor on some platforms equipped with AMD Cezanne SoC.
> >
> > On these platforms we need to implement "software" i2c arbitration.
> > Default arbitration owner is PSP and kernel asks for acquire as well
> > as inform about release of the i2c bus via mailbox mechanism.
> >
> >             +---------+
> >  <- ACQUIRE |         |
> >   +---------|   CPU   |\
> >   |         |         | \      +----------+  SDA
> >   |         +---------+  \     |          |-------
> > MAILBOX                   +--> |  I2C-DW  |  SCL
> >   |         +---------+        |          |-------
> >   |         |         |        +----------+
> >   +---------|   PSP   |
> >    <- ACK   |         |
> >             +---------+
> >
> >             +---------+
> >  <- RELEASE |         |
> >   +---------|   CPU   |
> >   |         |         |        +----------+  SDA
> >   |         +---------+        |          |-------
> > MAILBOX                   +--> |  I2C-DW  |  SCL
> >   |         +---------+  /     |          |-------
> >   |         |         | /      +----------+
> >   +---------|   PSP   |/
> >    <- ACK   |         |
> >             +---------+
> >
> > The solution is similar to i2c-designware-baytrail.c implementation, where
> > we are using a generic i2c-designware-* driver with a small "wrapper".
> >
> > In contrary to baytrail semaphore implementation, beside internal
> > acquire_lock() and release_lock() methods we are also applying quirks to
> > lock_bus() and unlock_bus() global adapter methods. With this in place
> > all i2c clients drivers may lock i2c bus for a desired number of i2c
> > transactions (e.g. write-wait-read) without being aware of that such bus
> > is shared with another entity.
> >
> > Modify i2c_dw_probe_lock_support() to select correct semaphore
> > implementation at runtime, since now we have more than one available.
> >
> > Configure new matching ACPI ID "AMDI0019" and register
> > ARBITRATION_SEMAPHORE flag in order to distinguish setup with PSP
> > arbitration.
> >
> > Add myself as a reviewer for I2C DesignWare in order to help with reviewing
> > and testing possible changes touching new i2c-designware-amdpsp.c module.
> >
> > Signed-off-by: Jan Dabros <jsd@semihalf.com>

> > Reported-by: kernel test robot <lkp@intel.com>
> > Reported-by: kernel test robot <lkp@intel.com>

New feature can't be reported.
If you want to give a credit to CI, do it in changelog.

...

> > +       depends on X86_64

Not sure if it's better than using non-atomic IO helpers.
At least you can't run 32-bit kernels on that platforms
in order to get this functionality working. Doest it mean
those platforms do not have 32-bit compatibility mode
anymore?

...

> > +#include <linux/io-64-nonatomic-lo-hi.h>

Ah, this is not needed if you keep code running exclusively on 64-bit
platforms.

...

> > +struct psp_mbox {
> > +       u32 cmd_fields;

> > +       phys_addr_t i2c_req_addr;

But phys_addr_t is platform-dependent type. Perhaps you meant to use u64 here
always?

> > +} __packed;

...

> > +       struct psp_mbox __iomem *mbox = (struct psp_mbox __iomem *)mbox_iomem;

For void * pointers the cast is implied, i.o.w. it's not needed here.

...

> > +static int psp_send_check_i2c_req(struct psp_i2c_req *req)
> > +{
> > +       if (psp_send_cmd(req))

> > +               return -EIO;

Why is error code shadowed?

> > +       return check_i2c_req_sts(req);
> > +}

...

> > +cleanup:
> > +       mutex_unlock(&psp_i2c_access_mutex);
> > +       return 0;

Not sure I understand why we ignore all above errors here.

...

> > +       if (!dev || !dev->dev)
> > +               return -ENODEV;

At which circumstances may we get
	dev != NULL
	dev->dev == NULL
?

...

> >         if (!dev || !dev->dev)
> > -               return 0;
> > +               return -ENODEV;

I see the same here, perhaps Hans knows the answer :-)

...

> > +static int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev)
> > +{
> > +       const struct i2c_dw_semaphore_callbacks *ptr;
> > +       int i = 0;
> > +       int ret;
> > +
> > +       ptr = i2c_dw_semaphore_cb_table;
> > +
> > +       dev->semaphore_idx = -1;
> > +
> > +       while (ptr->probe) {
> > +               ret = ptr->probe(dev);
> > +               if (ret) {

> > +                       /*
> > +                        * If there is no semaphore device attached to this
> > +                        * controller, we shouldn't abort general i2c_controller
> > +                        * probe.
> > +                        */
> > +                       if (ret == -ENODEV) {
> > +                               i++;
> > +                               ptr++;
> > +                               continue;
> > +                       } else {

Redundant 'else', but see below.

> > +                               return ret;
> > +                       }

May it be

	    if (ret != -ENODEV)
	        return ret;

	    i++;
	    ptr++;
	    continue;

?

> > +               }
> > +
> > +               dev->semaphore_idx = i;
> > +               break;
> > +       }
> > +
> > +       return 0;
> > +}

-- 
With Best Regards,
Andy Shevchenko