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References: <20220128120718.30545-1-yongqiang.niu@mediatek.com> <20220128120718.30545-3-yongqiang.niu@mediatek.com>
In-Reply-To: <20220128120718.30545-3-yongqiang.niu@mediatek.com>
From:   Chun-Kuang Hu <chunkuang.hu@kernel.org>
Date:   Sat, 29 Jan 2022 00:17:14 +0800
Message-ID: <CAAOTY_-qXrE+5ej2YUFCqrMmuNvRzcQtnyJPoSUD5O9N5fgs1A@mail.gmail.com>
Subject: Re: [PATCH v1, 2/4] soc: mediatek: add mtk mutex support for MT8186
To:     Yongqiang Niu <yongqiang.niu@mediatek.com>
Cc:     Chun-Kuang Hu <chunkuang.hu@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Jassi Brar <jassisinghbrar@gmail.com>,
        Fabien Parent <fparent@baylibre.com>,
        Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>,
        DTML <devicetree@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        DRI Development <dri-devel@lists.freedesktop.org>,
        Project_Global_Chrome_Upstream_Group@mediatek.com,
        Hsin-Yi Wang <hsinyi@chromium.org>
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Hi, Yongqiang:

Yongqiang Niu <yongqiang.niu@mediatek.com> =E6=96=BC 2022=E5=B9=B41=E6=9C=
=8828=E6=97=A5 =E9=80=B1=E4=BA=94 =E4=B8=8B=E5=8D=888:07=E5=AF=AB=E9=81=93=
=EF=BC=9A
>
> Add mtk mutex support for MT8186 SoC.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/soc/mediatek/mtk-mutex.c | 45 ++++++++++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-=
mutex.c
> index 2ca55bb5a8be..ebd95fd0f36e 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -26,6 +26,23 @@
>
>  #define INT_MUTEX                              BIT(1)
>
> +#define MT8186_MUTEX_MOD_DISP_OVL0             0
> +#define MT8186_MUTEX_MOD_DISP_OVL0_2L          1
> +#define MT8186_MUTEX_MOD_DISP_RDMA0            2
> +#define MT8186_MUTEX_MOD_DISP_COLOR0           4
> +#define MT8186_MUTEX_MOD_DISP_CCORR0           5
> +#define MT8186_MUTEX_MOD_DISP_AAL0             7
> +#define MT8186_MUTEX_MOD_DISP_GAMMA0           8
> +#define MT8186_MUTEX_MOD_DISP_POSTMASK0                9
> +#define MT8186_MUTEX_MOD_DISP_DITHER0          10
> +#define MT8186_MUTEX_MOD_DISP_RDMA1            17
> +
> +#define MT8186_MUTEX_SOF_SINGLE_MODE 0
> +#define MT8186_MUTEX_SOF_DSI0 1
> +#define MT8186_MUTEX_SOF_DPI0 2
> +#define MT8186_MUTEX_EOF_DSI0 (MT8186_MUTEX_SOF_DSI0 << 6)
> +#define MT8186_MUTEX_EOF_DPI0 (MT8186_MUTEX_SOF_DPI0 << 6)
> +
>  #define MT8167_MUTEX_MOD_DISP_PWM              1
>  #define MT8167_MUTEX_MOD_DISP_OVL0             6
>  #define MT8167_MUTEX_MOD_DISP_OVL1             7
> @@ -226,6 +243,19 @@ static const unsigned int mt8183_mutex_mod[DDP_COMPO=
NENT_ID_MAX] =3D {
>         [DDP_COMPONENT_WDMA0] =3D MT8183_MUTEX_MOD_DISP_WDMA0,
>  };
>
> +static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] =3D {
> +       [DDP_COMPONENT_AAL0] =3D MT8186_MUTEX_MOD_DISP_AAL0,
> +       [DDP_COMPONENT_CCORR] =3D MT8186_MUTEX_MOD_DISP_CCORR0,
> +       [DDP_COMPONENT_COLOR0] =3D MT8186_MUTEX_MOD_DISP_COLOR0,
> +       [DDP_COMPONENT_DITHER] =3D MT8186_MUTEX_MOD_DISP_DITHER0,
> +       [DDP_COMPONENT_GAMMA] =3D MT8186_MUTEX_MOD_DISP_GAMMA0,
> +       [DDP_COMPONENT_OVL0] =3D MT8186_MUTEX_MOD_DISP_OVL0,
> +       [DDP_COMPONENT_OVL_2L0] =3D MT8186_MUTEX_MOD_DISP_OVL0_2L,
> +       [DDP_COMPONENT_POSTMASK0] =3D MT8186_MUTEX_MOD_DISP_POSTMASK0,
> +       [DDP_COMPONENT_RDMA0] =3D MT8186_MUTEX_MOD_DISP_RDMA0,
> +       [DDP_COMPONENT_RDMA1] =3D MT8186_MUTEX_MOD_DISP_RDMA1,
> +};
> +
>  static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] =3D {
>         [DDP_COMPONENT_AAL0] =3D MT8192_MUTEX_MOD_DISP_AAL0,
>         [DDP_COMPONENT_CCORR] =3D MT8192_MUTEX_MOD_DISP_CCORR0,
> @@ -264,6 +294,12 @@ static const unsigned int mt8183_mutex_sof[MUTEX_SOF=
_DSI3 + 1] =3D {
>         [MUTEX_SOF_DPI0] =3D MT8183_MUTEX_SOF_DPI0 | MT8183_MUTEX_EOF_DPI=
0,
>  };
>
> +static const unsigned int mt8186_mutex_sof[MUTEX_SOF_DSI3 + 1] =3D {
> +       [MUTEX_SOF_SINGLE_MODE] =3D MUTEX_SOF_SINGLE_MODE,
> +       [MUTEX_SOF_DSI0] =3D MT8186_MUTEX_SOF_DSI0 | MT8186_MUTEX_EOF_DSI=
0,
> +       [MUTEX_SOF_DPI0] =3D MT8186_MUTEX_SOF_DPI0 | MT8186_MUTEX_EOF_DPI=
0,
> +};
> +
>  static const struct mtk_mutex_data mt2701_mutex_driver_data =3D {
>         .mutex_mod =3D mt2701_mutex_mod,
>         .mutex_sof =3D mt2712_mutex_sof,
> @@ -301,6 +337,13 @@ static const struct mtk_mutex_data mt8183_mutex_driv=
er_data =3D {
>         .no_clk =3D true,
>  };
>
> +static const struct mtk_mutex_data mt8186_mutex_driver_data =3D {
> +       .mutex_mod =3D mt8186_mutex_mod,
> +       .mutex_sof =3D mt8186_mutex_sof,
> +       .mutex_mod_reg =3D MT8183_MUTEX0_MOD0,
> +       .mutex_sof_reg =3D MT8183_MUTEX0_SOF0,
> +};
> +
>  static const struct mtk_mutex_data mt8192_mutex_driver_data =3D {
>         .mutex_mod =3D mt8192_mutex_mod,
>         .mutex_sof =3D mt8183_mutex_sof,
> @@ -540,6 +583,8 @@ static const struct of_device_id mutex_driver_dt_matc=
h[] =3D {
>           .data =3D &mt8173_mutex_driver_data},
>         { .compatible =3D "mediatek,mt8183-disp-mutex",
>           .data =3D &mt8183_mutex_driver_data},
> +       { .compatible =3D "mediatek,mt8186-disp-mutex",

Add "mediatek,mt8186-disp-mutex" to binding document.

Regards,
Chun-Kuang.

> +       .data =3D &mt8186_mutex_driver_data},
>         { .compatible =3D "mediatek,mt8192-disp-mutex",
>           .data =3D &mt8192_mutex_driver_data},
>         {},
> --
> 2.25.1
>