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Date:   Fri, 28 Jan 2022 15:05:36 -0800
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To:     ira.weiny@intel.com, Dave Hansen <dave.hansen@linux.intel.com>,
        "H. Peter Anvin" <hpa@zytor.com>,
        Dan Williams <dan.j.williams@intel.com>
Cc:     Fenghua Yu <fenghua.yu@intel.com>,
        Rick Edgecombe <rick.p.edgecombe@intel.com>,
        linux-kernel@vger.kernel.org
References: <20220127175505.851391-1-ira.weiny@intel.com>
 <20220127175505.851391-8-ira.weiny@intel.com>
From:   Dave Hansen <dave.hansen@intel.com>
Subject: Re: [PATCH V8 07/44] x86/pkeys: Add PKS CPU feature bit
In-Reply-To: <20220127175505.851391-8-ira.weiny@intel.com>
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On 1/27/22 09:54, ira.weiny@intel.com wrote:
> From: Ira Weiny <ira.weiny@intel.com>
> 
> Protection Keys for Supervisor pages (PKS) enables fast, hardware thread
> specific, manipulation of permission restrictions on supervisor page

Nit: should be "hardware-thread-specific".

> mappings.  It uses the same mechanism of Protection Keys as those on
> User mappings but applies that mechanism to supervisor mappings using a
> supervisor specific MSR.

"supervisor-specific"

	Memory Protection Keys (pkeys) provides a mechanism for
	enforcing page-based protections, but without requiring
	modification of the page tables when an application changes
	protection domains.

	The kernel currently supports the pkeys for userspace (PKU)
	architecture.  That architecture has been extended to
	additionally support supervisor mappings.  The supervisor
	support is referred to as PKS.

I probably wouldn't mention the MSR unless you want to say:

	The main difference between PKU and PKS is that PKS does not
	introduce any new instructions to write to its register.  The
	register is exposed as a normal MSR and is accessed with the
	normal MSR instructions.


> The CPU indicates support for PKS in bit 31 of the ECX register after a
> cpuid instruction.

I'd just remove this sentence.  We don't need to rehash each tiny morsel
of the architecture in a commit message.