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Date:   Sun, 30 Jan 2022 13:08:43 +0300
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Subject: Re: [PATCH v17 2/4] dmaengine: tegra: Add tegra gpcdma driver
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From:   Dmitry Osipenko <digetx@gmail.com>
To:     Akhil R <akhilrajeev@nvidia.com>, devicetree@vger.kernel.org,
        dmaengine@vger.kernel.org, jonathanh@nvidia.com,
        kyarlagadda@nvidia.com, ldewangan@nvidia.com,
        linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
        p.zabel@pengutronix.de, rgumasta@nvidia.com, robh+dt@kernel.org,
        thierry.reding@gmail.com, vkoul@kernel.org
Cc:     Pavan Kunapuli <pkunapuli@nvidia.com>
References: <1643474453-32619-1-git-send-email-akhilrajeev@nvidia.com>
 <1643474453-32619-3-git-send-email-akhilrajeev@nvidia.com>
 <ba109465-d7ee-09cb-775b-9b702a3910b0@gmail.com>
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30.01.2022 13:05, Dmitry Osipenko пишет:
> static int tegra_dma_device_resume(struct dma_chan *dc)
> {
> 	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
> 	u32 val;
> 
> 	if (!tdc->tdma->chip_data->hw_support_pause)
> 		return -ENOSYS;
> 
> 	if (!tdc->dma_desc)
> 		return 0;
> 
> 	val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE);
> 	val &= ~TEGRA_GPCDMA_CHAN_CSRE_PAUSE;
> 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);
> 	
> 	enable_irq(tdc->irq);

Correction:

if (tdc->dma_desc) {
	val = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSRE);
	val &= ~TEGRA_GPCDMA_CHAN_CSRE_PAUSE;
	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSRE, val);
}

enable_irq(tdc->irq);