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Date:   Mon, 31 Jan 2022 09:42:05 +0300
From:   Dmitry Osipenko <digetx@gmail.com>
To:     Akhil R <akhilrajeev@nvidia.com>
Cc:     "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Krishna Yarlagadda <kyarlagadda@nvidia.com>,
        Laxman Dewangan <ldewangan@nvidia.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
        "p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
        Rajesh Gumasta <rgumasta@nvidia.com>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "thierry.reding@gmail.com" <thierry.reding@gmail.com>,
        "vkoul@kernel.org" <vkoul@kernel.org>,
        Pavan Kunapuli <pkunapuli@nvidia.com>
Subject: Re: [PATCH v17 2/4] dmaengine: tegra: Add tegra gpcdma driver
Message-ID: <20220131094205.73f5f8c3@dimatab>
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=D0=92 Mon, 31 Jan 2022 04:25:14 +0000
Akhil R <akhilrajeev@nvidia.com> =D0=BF=D0=B8=D1=88=D0=B5=D1=82:

> > 30.01.2022 19:34, Akhil R =D0=BF=D0=B8=D1=88=D0=B5=D1=82: =20
> > >> 29.01.2022 19:40, Akhil R =D0=BF=D0=B8=D1=88=D0=B5=D1=82: =20
> > >>> +static int tegra_dma_device_pause(struct dma_chan *dc) {
> > >>> +     struct tegra_dma_channel *tdc =3D to_tegra_dma_chan(dc);
> > >>> +     unsigned long wcount, flags;
> > >>> +     int ret =3D 0;
> > >>> +
> > >>> +     if (!tdc->tdma->chip_data->hw_support_pause)
> > >>> +             return 0; =20
> > >>
> > >> It's wrong to return zero if pause unsupported, please see what
> > >> dmaengine_pause() returns.
> > >> =20
> > >>> +
> > >>> +     spin_lock_irqsave(&tdc->vc.lock, flags);
> > >>> +     if (!tdc->dma_desc)
> > >>> +             goto out;
> > >>> +
> > >>> +     ret =3D tegra_dma_pause(tdc);
> > >>> +     if (ret) {
> > >>> +             dev_err(tdc2dev(tdc), "DMA pause timed out\n");
> > >>> +             goto out;
> > >>> +     }
> > >>> +
> > >>> +     wcount =3D tdc_read(tdc, TEGRA_GPCDMA_CHAN_XFER_COUNT);
> > >>> +     tdc->dma_desc->bytes_xfer +=3D
> > >>> +                     tdc->dma_desc->bytes_req - (wcount * 4); =20
> > >>
> > >> Why transfer is accumulated?
> > >>
> > >> Why do you need to update xfer size at all on pause? =20
> > >
> > > I will verify the calculation. This looks correct only for single
> > > sg transaction.
> > >
> > > Updating xfer_size is added to support drivers which pause the
> > > transaction and read the status before terminating.
> > > Eg. =20
> >=20
> > Why you couldn't update the status in tegra_dma_terminate_all()? =20
> Is it useful to update the status in terminate_all()? I assume the
> descriptor Is freed in vchan_dma_desc_free_list() or am I getting it
> wrong?

Yes, it's not useful. Then you only need to fix the tx_status() and
don't touch dma_desc on pause.