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[23.128.96.18]) by mx.google.com with ESMTP id c70si4300651pfc.24.2022.02.01.12.16.15; Tue, 01 Feb 2022 12:16:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@sartura-hr.20210112.gappssmtp.com header.s=20210112 header.b=J1xqT4Wd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378381AbiAaNAi (ORCPT + 99 others); Mon, 31 Jan 2022 08:00:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344156AbiAaNAh (ORCPT ); Mon, 31 Jan 2022 08:00:37 -0500 Received: from mail-il1-x12e.google.com (mail-il1-x12e.google.com [IPv6:2607:f8b0:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E43E4C061714 for ; Mon, 31 Jan 2022 05:00:36 -0800 (PST) Received: by mail-il1-x12e.google.com with SMTP id i2so2539562ilm.12 for ; Mon, 31 Jan 2022 05:00:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=dSdj6+/sfksSA1uArlRQHiUhIJOWxGXX+eQ0rGayhu4=; b=J1xqT4WdO+z9nBPjGXWQQTsijFA3X8Ksw+wJJXK/vOuUo/cQKQcSRkP5Omdgcy5luX +YmdWF7nH2oHD1AnotOBWD3ovK3VpPU/K7wYAp8uClL91ZxAzVa2hL2bQbhUcWw4D3q2 kb4ruW5s2SjojUtylRCcErcbp0cbk0B9pLObgbOW3Kc83ER/eeONMSyt0LXa/LL0RzaT HExbqB9d3n0761mfKYbc5JGfZZmn/sXQNPq7E7YSVI6UIIT70VvQWmV7bEUwLMgwIYWE CqfWaOtTiweXrQPG8s0Pc8aV+XmKDXybEJnzIYgKIzgBMgl9vO3kyxcoZkgdOiROC2+B i5Jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=dSdj6+/sfksSA1uArlRQHiUhIJOWxGXX+eQ0rGayhu4=; b=rLIKKYkUY9CeC224rBFTw7E2lemgurBbcHfkVYAQ+zDWcn2bK5rEqLGUkzZQBldDt2 IoiSl6ZBZdZDdV7vhKW/y16SoTEDC99mSbmtabn2NrrT+upWkX2S/sPq7mNlJIZfKlwd LVij1TzXq9cBjf1xRyUuLEY1dFSTY+XcaTEYLcsgzKOQ59dgwTlmZNaBpY2KKxKVRkHE Gfj9Q3OuAoMp4QKQ1sSWKhiDvj+yTha7VTekXrQIkEHYw47EZSw2YVq97Wxy6GtLmd3/ APhAjIO+xCjPjIihzaaAHhSUglZJP/OsgPkl9CmVAYmVcpObV3sS138CbJUU+KYRY1CV Rq0w== X-Gm-Message-State: AOAM5334vG/TS+P1kNrKAQRPO1a7VaGP2fLQJ+ls5n/N9GU3VNevBwjm RkKA151cTCaBFH+GGwJjPAbHW5k7mN2PnH5VVLsd9A== X-Received: by 2002:a92:8e0d:: with SMTP id c13mr11729336ild.159.1643634036343; Mon, 31 Jan 2022 05:00:36 -0800 (PST) MIME-Version: 1.0 References: <20220130145116.88406-1-nbd@nbd.name> <20220130145116.88406-4-nbd@nbd.name> <04c91b4e-e7c8-ac6a-f60a-0453a49122fa@nbd.name> In-Reply-To: <04c91b4e-e7c8-ac6a-f60a-0453a49122fa@nbd.name> From: Robert Marko Date: Mon, 31 Jan 2022 14:00:25 +0100 Message-ID: Subject: Re: [PATCH v9 03/13] ARM: Add basic support for Airoha EN7523 SoC To: Felix Fietkau Cc: Luka Perkov , Russell King , Arnd Bergmann , Olof Johansson , soc@kernel.org, Rob Herring , linux-mediatek@lists.infradead.org, Linux ARM , John Crispin , Linux Kernel Mailing List , devicetree Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 31, 2022 at 1:57 PM Felix Fietkau wrote: > > > On 31.01.22 11:51, Luka Perkov wrote: > > Hello Felix, > > > > On Sun, Jan 30, 2022 at 3:56 PM Felix Fietkau wrote: > >> > >> From: John Crispin > >> > >> EN7523 is an armv8 based silicon used inside broadband access type devices > >> such as xPON and xDSL. It shares various silicon blocks with MediaTek > >> silicon such as the MT7622. > >> > >> Add basic support for Airoha EN7523, enough for booting to console. > >> > >> The UART is basically 8250-compatible, except for the clock selection. > >> A clock-frequency value is synthesized to get this to run at 115200 bps. > >> > >> Signed-off-by: John Crispin > >> Signed-off-by: Bert Vermeulen > >> Signed-off-by: Felix Fietkau > >> --- > >> index 000000000000..ea23b5abb478 > >> --- /dev/null > >> +++ b/arch/arm/mach-airoha/airoha.c > >> @@ -0,0 +1,16 @@ > >> +// SPDX-License-Identifier: GPL-2.0-or-later > >> +/* > >> + * Device Tree support for Airoha SoCs > >> + * > >> + * Copyright (c) 2022 Felix Fietkau > >> + */ > >> +#include > >> + > >> +static const char * const airoha_board_dt_compat[] = { > >> + "airoha,en7523", > >> + NULL, > >> +}; > >> + > >> +DT_MACHINE_START(MEDIATEK_DT, "Airoha Cortex-A53 (Device Tree)") > > > > Since this is Cortex-A53 core is there a reason why this is not placed > > within arm64 directory? > From what I can tell, it's a stripped-down core that only runs in > 32-bit mode. Hmm, this is new for me that you could do that to an ARMv8 (A53) core. I know that you can run ARMv7 code but not that you can reduce it to 32 bit only. Regards, Robert > > - Felix -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 10000 Zagreb, Croatia Email: robert.marko@sartura.hr Web: www.sartura.hr