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Message-ID: <031eceaf-402f-7bca-10c4-8959e62e7fe3@opensource.wdc.com>
Date:   Thu, 3 Feb 2022 08:49:42 +0900
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Subject: Re: [PATCH v3] ata: ahci: Skip 200 ms debounce delay for Marvell
 88SE9235
Content-Language: en-US
From:   Damien Le Moal <damien.lemoal@opensource.wdc.com>
To:     Paul Menzel <pmenzel@molgen.mpg.de>
Cc:     linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org
References: <20220201071229.6418-1-pmenzel@molgen.mpg.de>
 <3437ffcb-68b5-04e5-acd5-b3857fbf1be7@opensource.wdc.com>
 <1378dd0a-52d2-c998-5713-e6875c601194@molgen.mpg.de>
 <4c3df325-dc9f-5eed-5585-7d2e5203b65f@opensource.wdc.com>
Organization: Western Digital Research
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On 2/3/22 08:05, Damien Le Moal wrote:
>>> ata: ahci: Add support for Marvell 88SE9235 adapter
>>>
>>> Since it is exactly what this patch is doing by adding a PCI ID.
>>
>> Thank you for applying the patch. I saw the summary/title change also=20
>> with the other patch. I am sorry, but I totally disagree. Reading that=
=20
>> summary/title in `git log --oneline`, it=E2=80=99s not clear at all, w=
hat the=20
>> patch does, and the full description or diff has to be read. =E2=80=9C=
Add=20
>> support=E2=80=9D for me means, that it was unsupported before, which i=
s not true=20
>> at all as the defaults were used.
>=20
> Right... I did not consider the final entry in the ahci_pci_tbl table
> which matches against the device against the PCI AHCI storage class.
> So right you are. I will restore your original commit title/message.
>=20
> Thanks for checking.

Fixed now !


--=20
Damien Le Moal
Western Digital Research