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[2620:137:e000::1:20]) by mx.google.com with ESMTP id w23si22275765pgj.124.2022.02.03.09.33.14; Thu, 03 Feb 2022 09:33:26 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=t36cXuzJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239150AbiBCLHV (ORCPT + 99 others); Thu, 3 Feb 2022 06:07:21 -0500 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:43148 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231448AbiBCLHS (ORCPT ); Thu, 3 Feb 2022 06:07:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1643886438; x=1675422438; h=subject:to:cc:references:from:message-id:date: mime-version:in-reply-to:content-transfer-encoding; bh=2C+3IsYfm09Uf6TZuQK9DHohoF0hBiKau/8SF3sQH0I=; b=t36cXuzJqksOE/9dWfaka3/EtRfp9ZCEf1Cj/vA8LDtdJ15XnHLZFnSq pYbyNsyHhgyKMMrRh27bMZA4loFZR49jocX35T1YMYf0pM3ZYVRebElhD viUE8YNxs9Aq4SjOawfaVzk8UGpuhLCba4ux9vpFlHeLlJpxZLdphr1rd M=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-01.qualcomm.com with ESMTP; 03 Feb 2022 03:07:17 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg01-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2022 03:07:17 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Thu, 3 Feb 2022 03:07:16 -0800 Received: from [10.216.62.64] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.19; Thu, 3 Feb 2022 03:07:12 -0800 Subject: Re: [PATCH v2 2/3] arm64: dts: qcom: sc7280: Add lpass cpu node To: Stephen Boyd , , , , , , , , , , CC: Venkata Prasad Potturu References: <1641208380-15510-1-git-send-email-quic_srivasam@quicinc.com> <1641208380-15510-3-git-send-email-quic_srivasam@quicinc.com> From: Srinivasa Rao Mandadapu Organization: Qualcomm Message-ID: Date: Thu, 3 Feb 2022 16:37:09 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8"; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/6/2022 2:37 AM, Stephen Boyd wrote: Thanks for Your time Stephen!!! > Quoting Srinivasa Rao Mandadapu (2022-01-03 03:12:59) >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> index c0d9de3..68c7755 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> @@ -17,6 +17,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> / { >> @@ -1840,6 +1841,62 @@ >> #size-cells = <0>; >> }; >> >> + lpass_cpu: qcom,lpass@3260000 { > audio-subsystem@3260000? Okay. will change accordingly. > >> + compatible = "qcom,sc7280-lpass-cpu"; >> + reg = <0 0x3260000 0 0xC000>, >> + <0 0x3280000 0 0x29000>, >> + <0 0x3340000 0 0x29000>, >> + <0 0x336C000 0 0x3000>, >> + <0 0x3987000 0 0x68000>, >> + <0 0x3B00000 0 0x29000>; >> + reg-names = "lpass-rxtx-cdc-dma-lpm", >> + "lpass-rxtx-lpaif", >> + "lpass-va-lpaif", >> + "lpass-va-cdc-dma-lpm", >> + "lpass-hdmiif", >> + "lpass-lpaif"; >> + >> + iommus = <&apps_smmu 0x1820 0>, >> + <&apps_smmu 0x1821 0>, >> + <&apps_smmu 0x1832 0>; >> + status = "disabled"; >> + >> + power-domains = <&rpmhpd SC7280_LCX>; >> + power-domain-names = "lcx"; >> + required-opps = <&rpmhpd_opp_nom>; >> + >> + clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>, >> + <&lpasscc LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>, >> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>, >> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>, >> + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>, >> + <&lpasscc LPASS_CORE_CC_EXT_IF0_IBIT_CLK>, >> + <&lpasscc LPASS_CORE_CC_EXT_IF1_IBIT_CLK>, >> + <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>; >> + clock-names = "aon_cc_audio_hm_h", >> + "core_cc_sysnoc_mport_core", >> + "audio_cc_codec_mem0", >> + "audio_cc_codec_mem1", >> + "audio_cc_codec_mem2", >> + "core_cc_ext_if0_ibit", >> + "core_cc_ext_if1_ibit", >> + "aon_cc_va_mem0"; > Please align these things on " and <. Okay. > >> + >> + #sound-dai-cells = <1>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + interrupts = , >> + , >> + , >> + ; >> + >> + interrupt-names = "lpass-irq-lpaif", >> + "lpass-irq-vaif", >> + "lpass-irq-rxtxif", >> + "lpass-irq-hdmi"; > Same. Okay. > >> + }; >> + >> vamacro: codec@3370000 { >> compatible = "qcom,sc7280-lpass-va-macro"; >> pinctrl-0 = <&dmic01_active>; >> -- >> 2.7.4 >>