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Subject: Re: [PATCH] RISC-V: KVM: make CY, TM, and IR counters accessible in
 VU mode
From:   Jessica Clarke <jrtc27@jrtc27.com>
In-Reply-To: <CAAhSdy2wX7Re4yepV7ReNQazF9jb-eqSUDE7rLCarr3iUchzkQ@mail.gmail.com>
Date:   Wed, 2 Feb 2022 13:19:31 +0000
Cc:     Mayuresh Chitale <mchitale@ventanamicro.com>,
        Atish Patra <atishp@atishpatra.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        kvm-riscv@lists.infradead.org,
        linux-riscv <linux-riscv@lists.infradead.org>,
        "linux-kernel@vger.kernel.org List" <linux-kernel@vger.kernel.org>
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Message-Id: <B04F937F-6FC8-42F5-9D6B-7EF1148F9646@jrtc27.com>
References: <20220131110307.1684739-1-mchitale@ventanamicro.com>
 <CAAhSdy2wX7Re4yepV7ReNQazF9jb-eqSUDE7rLCarr3iUchzkQ@mail.gmail.com>
To:     Anup Patel <anup@brainfault.org>
Precedence: bulk

On 2 Feb 2022, at 11:14, Anup Patel <anup@brainfault.org> wrote:
>=20
> On Mon, Jan 31, 2022 at 4:33 PM Mayuresh Chitale
> <mchitale@ventanamicro.com> wrote:
>>=20
>> Those applications that run in VU mode and access the time CSR cause
>> a virtual instruction trap as Guest kernel currently does not
>> initialize the scounteren CSR.
>>=20
>> To fix this, we should make CY, TM, and IR counters accessibile
>> by default in VU mode (similar to OpenSBI).
>>=20
>> Fixes: a33c72faf2d73 ("RISC-V: KVM: Implement VCPU create, init and
>> destroy functions")
>> Cc:stable@vger.kernel.org
>> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
>=20
> Thanks, I have queued this for fixes.

The formatting is clearly wrong...

> Regards,
> Anup
>=20
>> ---
>> arch/riscv/kvm/vcpu.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>=20
>> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
>> index 0c5239e05721..caaf824347b9 100644
>> --- a/arch/riscv/kvm/vcpu.c
>> +++ b/arch/riscv/kvm/vcpu.c
>> @@ -90,6 +90,7 @@ int kvm_arch_vcpu_precreate(struct kvm *kvm, =
unsigned int id)
>> int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
>> {
>>        struct kvm_cpu_context *cntx;
>> +       struct kvm_vcpu_csr *reset_csr =3D =
&vcpu->arch.guest_reset_csr;
>>=20
>>        /* Mark this VCPU never ran */
>>        vcpu->arch.ran_atleast_once =3D false;
>> @@ -106,6 +107,9 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
>>        cntx->hstatus |=3D HSTATUS_SPVP;
>>        cntx->hstatus |=3D HSTATUS_SPV;
>>=20
>> +       /* By default, make CY, TM, and IR counters accessible in VU =
mode */
>> +       reset_csr->scounteren=3D0x7;

... here

Jess

>> +
>>        /* Setup VCPU timer */
>>        kvm_riscv_vcpu_timer_init(vcpu);
>>=20
>> --
>> 2.25.1
>>=20
>=20
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