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Date:   Sat, 5 Feb 2022 10:18:07 +0800
From:   Leo Yan <leo.yan@linaro.org>
To:     Ali Saidi <alisaidi@amazon.com>
Cc:     Al.Grant@arm.com, acme@kernel.org,
        alexander.shishkin@linux.intel.com, andrew.kilroy@arm.com,
        benh@kernel.crashing.org, german.gomez@arm.com,
        james.clark@arm.com, john.garry@huawei.com, jolsa@redhat.com,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-perf-users@vger.kernel.org, mark.rutland@arm.com,
        mathieu.poirier@linaro.org, mingo@redhat.com, namhyung@kernel.org,
        peterz@infradead.org, will@kernel.org
Subject: Re: [PATCH] perf arm-spe: Use SPE data source for neoverse cores
Message-ID: <20220205021807.GA2052922@leoy-ThinkPad-X240s>
References: <20220203091934.GA2013381@leoy-ThinkPad-X240s>
 <20220205000719.19986-1-alisaidi@amazon.com>
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Hi Ali,

On Sat, Feb 05, 2022 at 12:07:19AM +0000, Ali Saidi wrote:

[...]

> >Alternatively, we can support HITM tag for L1/L2 cache levels in perf,
> >this can allow us to match memory topology on Arm64 arch, and it should
> >not introduce any regression on x86 arch.
> >
> >Could you confirm if below code can fix the issue or not?
> 
> Yes, that should do it. Want me to repsin this with the changes we discussed?

Yes, please go ahead and thanks a lot for your effort.

Leo