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From:   Krishna Yarlagadda <kyarlagadda@nvidia.com>
To:     <broonie@kernel.org>, <thierry.reding@gmail.com>,
        <jonathanh@nvidia.com>, <linux-spi@vger.kernel.org>,
        <linux-tegra@vger.kernel.org>
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        <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <p.zabel@pengutronix.de>,
        Krishna Yarlagadda <kyarlagadda@nvidia.com>
Subject: [PATCH 5/6] dt-bindings: spi: Tegra QUAD SPI combined sequence
Date:   Fri, 4 Feb 2022 15:59:35 +0530
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Tegra194 and later chips support combined sequence mode which result
in less interrupts and better perf. This flag helps enable it.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
---
 Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
index 6efea89..3767059 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
@@ -46,6 +46,14 @@ properties:
       - const: rx
       - const: tx
 
+  nvidia,cmb-xfer:
+    description:
+      Enable combined sequence transfers for read and program sequence
+      if supported by hardware. Tegra194 and later chips support this
+      feature. Default is non combined sequence. SPI message should
+      contain CMD-ADDR-DATA transfers to combine and send to hardware.
+    type: boolean
+
 patternProperties:
   "@[0-9a-f]+":
     type: object
-- 
2.7.4